ST10F296E datasheet(74/346 Pages) STMICROELECTRONICS

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The bootstrap loader

ST10F296E

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Figure 10.

UART bootstrap loader sequence

BSL initialization time > 1ms @ fCPU = 40 MHz.

Zero byte (1 start bit, eight 0 data bits, 1 stop bit), sent by host.

Acknowledge byte, sent by ST10F296E.

32 bytes of code / data, sent by host.

TxD0 is only driven a certain time after reception of the zero byte (1.3 ms @ fCPU = 40 MHz).

Internal boot ROM / Test-Flash.

6.3.2

Entering bootstrap via UART

The ST10F296E enters BSL mode at the end of a hardware reset if pin P0L.4 is sampled

low. In this case, the built-in bootstrap loader is activated independent of the selected bus

mode. The bootstrap loader code is stored in a special Test-Flash, for which no part of the

standard mask ROM or Flash memory area is required.

After entering BSL mode and the respective initialization, the ST10F296E scans the RxD0

line to receive a zero byte (one start bit, eight 0 data bits and one stop bit). From this zero

byte, it calculates the corresponding baud rate factor with respect to the current CPU clock,

initializes the serial interface ASC0 accordingly, and switches the TxD0 pin to output. Using

this baud rate, an acknowledge byte is returned to the host that provides the loaded data.

The acknowledge byte for the ST10F296E is D5h.

RSTIN

TxD0

Int. boot ROM/Test-Flash BSL-routine

32 bytes

RxD0

CSP:IP

user software

P0L.4

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ST10F296E Datasheet(PDF) 74 Page - STMicroelectronics