AD5405YCP datasheet(15/24 Pages) AD

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AD5405

Rev. 0 | Page 15 of 24

Stability

In the I-to-V configuration, the IOUT of the DAC and the

inverting node of the op amp must be connected as close as

possible, and proper PCB layout techniques must be employed.

Because every code change corresponds to a step function, gain

peaking may occur if the op amp has limited GBP and there is

excessive parasitic capacitance at the inverting node. This

parasitic capacitance introduces a pole into the open loop

response which can cause ringing or instability in the closed-

loop applications circuit.

An optional compensation capacitor, C1, can be added in

parallel with RFB for stability, as shown in Figure 32 and

Figure 33. Too small a value of C1 can produce ringing at the

output, while too large a value can adversely affect the settling

time. C1 should be found empirically, but 1 pF to 2 pF is

generally adequate for the compensation.

SINGLE-SUPPLY APPLICATIONS

Voltage Switching Mode of Operation

Figure 34 shows these DACs operating in the voltage switching

mode. The reference voltage, VIN, is applied to the IOUT1 pin,

IOUT2 is connected to AGND, and the output voltage is available

at the VREF terminal. In this configuration, a positive reference

voltage results in a positive output voltage, making single-

supply operation possible. The output from the DAC is voltage

at a constant impedance (the DAC ladder resistance). Thus an

op amp is necessary to buffer the output voltage. The reference

input no longer sees a constant input impedance, but one that

varies with code. So, the voltage input should be driven from a

low impedance source.

VOUT

VDD

GND

VIN

IOUT2

IOUT1

RFB

VDD

VREF

NOTES

1. SIMILAR CONFIGURATION FOR DAC B

2. C1 PHASE COMPENSATION (1pF–2pF) MAY BE REQUIRED

IF A1 IS A HIGH SPEED AMPLIFIER.

Figure 34. Single-Supply Voltage Switching Mode

Note that VIN is limited to low voltages because the switches in

the DAC ladder no longer have the same source-drain drive

voltage. As a result, their on resistance differs and degrades the

integral linearity of the DAC. Also, VIN must not go negative by

more than 0.3 V or an internal diode turns on, exceeding the

max ratings of the device. In this type of application, the full

range of multiplying capability of the DAC is lost.

POSITIVE OUTPUT VOLTAGE

Note that the output voltage polarity is opposite to the VREF

polarity for dc reference voltages. In order to achieve a positive

voltage output, an applied negative reference to the input of

the DAC is preferred over the output inversion through an

inverting amplifier because of the resistor’s tolerance errors. To

generate a negative reference, the reference can be level shifted

by an op amp such that the VOUT and GND pins of the reference

become the virtual ground and −2.5 V respectively, as shown in

Figure 35.

VOUT = 0V TO +2.5V

VDD = +5V

GND

IOUT2

IOUT1

RFB

VDD

VREF

GND

VIN

VOUT

ADR03

+5V

–5V

1/2 AD8552

12-BIT DAC

–2.5V

NOTES

1. SIMILAR CONFIGURATION FOR DAC B

2. C1 PHASE COMPENSATION (1pF–2pF) MAY BE REQUIRED

IF A1 IS A HIGH SPEED AMPLIFIER.

Figure 35. Positive Voltage Output with Minimum Components

ADDING GAIN

In applications where the output voltage is required to be

greater than VIN, gain can be added with an additional external

amplifier or it can also be achieved in a single stage. Consider

the effect of temperature coefficients of the thin film resistors

of the DAC. Simply placing a resistor in series with the RFB

resistor causes mismatches in the temperature coefficients

resulting in larger gain temperature coefficient errors. Instead,

the circuit of Figure 36 is a recommended method of increasing

the gain of the circuit. R1, R2, and R3 should all have similar

temperature coefficients, but they need not match the temper-

ature coefficients of the DAC. This approach is recommended

in circuits where gains of > 1 are required.

VOUT

VDD

GND

IOUT2

IOUT1

RFB

VDD

VREF

12-BIT

DAC

VIN

R1 = R2R3

R2 + R3

GAIN = R2 + R3

NOTES

1. SIMILAR CONFIGURATION FOR DAC B

2. C1 PHASE COMPENSATION (1pF–2pF) MAY BE REQUIRED

IF A1 IS A HIGH SPEED AMPLIFIER.

Figure 36. Increasing Gain of Current Output DAC

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