AD5405YCP datasheet(16/24 Pages) AD

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AD5405

Rev. 0 | Page 16 of 24

USED AS A DIVIDER OR PROGRAMMABLE GAIN

ELEMENT

Used as a divider or programmable gain element, current-

steering DACs are very flexible and lend themselves to many

different applications. If this type of DAC is connected as the

feedback element of an op amp, and RFB is used as the input

resistor, as shown in Figure 37, then the output voltage is

inversely proportional to the digital input fraction D.

For D = 1−2n the output voltage is

(

OUT

−

VOUT

VDD

GND

VIN

IOUT2

IOUT1

RFB

VDD

VREF

NOTE

ADDITIONAL PINS OMITTED FOR CLARITY

Figure 37. Current-Steering DAC Used as a Divider or

Programmable Gain Element

As D is reduced, the output voltage increases. For small values

of the digital fraction D, it is important to ensure that the

amplifier does not saturate and also that the required accuracy

is met. For example, an 8-bit DAC driven with the binary code

0 × 10 (00010000), that is, 16 decimal, in the circuit of Figure 37

should cause the output voltage to be 16 × VIN. However, if the

DAC has a linearity specification of ±0.5 LSB, then D can, in

fact, have the weight anywhere in the range 15.5/256 to 16.5/256

so that the possible output voltage is in the range 15.5 VIN to

16.5 VIN—an error of 3% even though the DAC itself has a

maximum error of 0.2%.

DAC leakage current is also a potential error source in divider

circuits. The leakage current must be counterbalanced by an

opposite current supplied from the op amp through the DAC.

Because only a fraction D of the current into the VREF terminal

is routed to the IOUT1 terminal, the output voltage has to change

as follows:

Output Error Voltage Due to DAC Leakage =

(Leakage × R)/D

where R is the DAC resistance at the VREF terminal.

For a DAC leakage current of 10 nA, R = 10 kΩ and a gain (that

is, 1/D) of 16, the error voltage is 1.6 mV.

REFERENCE SELECTION

When selecting a reference for use with the AD5405 series of

current output DACs, pay attention to the reference output

voltage temperature coefficient specification. This parameter

not only affects the full-scale error, but can also affect the

linearity (INL and DNL) performance. The reference temper-

ature coefficient should be consistent with the system accuracy

specifications. For example, an 8-bit system required to hold

its overall specification to within 1 LSB over the temperature

range 0°C to 50°C dictates that the maximum system drift with

temperature should be less than 78 ppm/°C. A 12-bit system

with the same temperature range to overall specification within

2 LSBs requires a maximum drift of 10 ppm/°C. By choosing a

precision reference with low output temperature coefficient, this

error source can be minimized. Table 7 lists some references

available from Analog Devices that are suitable for use with this

range of current output DACs.

AMPLIFIER SELECTION

The primary requirement for the current-steering mode is an

amplifier with low input bias currents and low input offset

voltage. The input offset voltage of an op amp is multiplied by

the variable gain (due to the code-dependent output resistance

of the DAC) of the circuit. A change in this noise gain between

two adjacent digital fractions produces a step change in the

output voltage due to the amplifier’s input offset voltage. This

output voltage change is superimposed upon the desired change

in output between the two codes and gives rise to a differential

linearity error, which, if large enough, could cause the DAC to

be nonmonotonic.

The input bias current of an op amp also generates an offset at

the voltage output as a result of the bias current flowing in the

feedback resistor RFB. Most op amps have input bias currents low

enough to prevent any significant errors in 12-bit applications.

Common-mode rejection of the op amp is important in

voltage-switching circuits, because it produces a code-

dependent error at the voltage output of the circuit. Most

op amps have adequate common-mode rejection for use at

12-bit resolution.

Provided the DAC switches are driven from true wide band,

low impedance sources (VIN and AGND) they settle quickly.

Consequently, the slew rate and settling time of a voltage-

switching DAC circuit is determined largely by the output op

amp. To obtain minimum settling time in this configuration,

minimize capacitance at the VREF node (voltage output node in

this application) of the DAC. This is done by using low input

capacitance buffer amplifiers and careful board design.

Most single-supply circuits include ground as part of the analog

signal range, which in turn requires an amplifier that can handle

rail-to-rail signals. Analog Devices offers a large range of single-

supply amplifiers, as listed in Table 8.

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