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The Low Side driver survives deployment condition 3 as defined above.

Upon receiving a valid deployment condition, the respective SQH and SQL drivers are turned on. Also,

SQH and SQL drivers are turned on momentarily during a MOS diagnostic. Otherwise, SQH and SQL are

inactive under any normal, fault, or transient conditions. Upon a successful deployment of the respective

SQH and SQL drivers, a deploy command success flag is asserted via SPI. Refer to Figure 4, Figure 5,

Figure 6, and Figure 7. for the valid deployment condition and the "Deploy Command Success" timing.

The following power-up conditions are considered as normal operations in OSD. VRES input can be con-

nected to either a power supply output or an ignition voltage. VDD is connected to the 5V output of power

supply. When VRES is connected to the power supply, VDD voltage will reach its regulation voltage before

VRES voltage is stabilized. In this condition, OSD has a control of its internal logic and prevents an inad-

vertent turn-on of the drivers.

When VRES is connected to the ignition, VRES voltage will be stabilized before VDD reach its regulation

voltage. In this condition, all drivers are inactive. A pulldown on the gates of high side drivers (SQH) is

provided to prevent these drivers from momentarily turning-on.

Any fault conditions on OSD does not turn on the SQH and SQL drivers. Only a valid deployment condition

turns on the respective SQH and SQL drivers.

4.3

Arming Inputs

The arming inputs serve as a fail-safe mechanism to prevent inadvertent deployment. Along with the SPI

deployment bit, these inputs provide redundancy. These pins are used either as discrete outputs or as a

serial data communication interface with 4-bit shift register. Pulse stretch timer is provided for each chan-

nel/loop. Either ARMx signal or SPI deployment bit starts the pulse stretcher.

Figure 8. Arming Serial Mode Diagram

When a valid deployment command is sent through the SPI, the pulse stretcher is initiated immediately

following the falling edge of CS. When another valid deployment command is sent before the timer for the

first command expired, the timer is refreshed. Sending an idle command terminates the pulse stretch timer

operation. ONLY a timer operation started by a valid SPI deployment command is terminated. An idle com-

mand does not affect the timer operation started by ARM signal. OSD deploys a channel, ONLY when the

respective ARM signal is asserted during a valid pulse stretcher signal. During the deployment, OSD turns

on the respective high (SQH) and low side (SQL) drivers for tDEPLOY. Once deployment is initiated it can

not be terminated. If one or more channels are deploying, OSD ignores all commands to the respective

channels. The rest of the channels resume operation and respond to the SPI commands. Refer to Figure

5 for a deployment diagram initiated by a SPI deployment command.

In a discrete mode, when the ARM signal is asserted (active high), the pulse stretcher signal is asserted

after the de-glitch filter time, tGLITCH, expires. The de-glitch filter is used to prevent noise from starting

the pulse stretcher. The pulse stretcher timer, tPULSE, is initiated after a de-glitch time of the ARM falling

edge. OSD deploys a channel, ONLY when the respective SPI deployment command is sent during a valid

pulse stretcher signal. During the deployment, OSD turns on the respective high (SQH) and low side

(SQL) drivers for tDEPLOY. When deployment is initiated it can not be stopped. Refer to Figure 4 and

Figure 5 for a deployment diagram initiated by an ARM discrete signal.

In serial mode, OSD latch the arm state for each channel from the shift register when ARMEN is negated.

After the de-glitch filter time, tGLITCH, of the ARMEN falling edge expires, OSD starts the pulse stretch

timer for the respective channel. Serial mode is selected by setting bit D5 in the Deployment Configuration

Register 1 (see "Deployment Configuration Register 1 table 15"). OSD deploys a channel, ONLY when

the respective SPI deployment command is sent during a valid pulse stretcher signal. During the deploy-

ARM45/ARMCLK

ARM67/ARMOUT

ARM23/ARMEN

MSB

LSB

ARM01/ARMIN

SPI Shift Register

spi.config1reg.d5

Obsolete

Product(s)

- Obsolete

Product(s)