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L9634 Datasheet(PDF) 25 Page - STMicroelectronics

Part # L9634
Description  SQUIB RESISTANCE MEASUREMENT
PDF  36 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

L9634 Datasheet(HTML) 25 Page - STMicroelectronics

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L9634
4.28 Deployment Configuration Register 2
The second deployment configuration register contains bits to configure the deployment period and the
deployment current for each loop. During a deployment event, a write request to this register is inhibited.
The register is defined as shown in herebelow table.
Table 17. Deployment Configuration Register 2
4.29 Soft Reset
The soft reset in OSD is achieved by writing $AA and $55 within two subsequent 16-bit SPI transmissions.
If the sequence is broken, the processor will be required to re-transmit the sequence. OSD is not in reset
if the sequence is not completed within two subsequent 16-bit SPI transmissions.
4.30 Diagnostic Fault Registers
These diagnostic fault registers contain the fault status for each of the channels.
Each register is cleared immediately after a SPI reading on that particular register.
The diagnostic fault registers is defined as shown here below:
Table 18. Diagnostic Fault Register: Channel 0 and 1
Bit
Status
Description
D7
0
Channel 6/7 2ms Deployment Period (default)
1
Channel 6/7 4ms Deployment Period
D6
0
Channel 6/7 1.2A Deployment Current (default)
1
Channel 6/7 1.75A Deployment Current
D5
0
Channel 4/5 2ms Deployment Period (default)
1
Channel 4/5 4ms Deployment Period
D4
0
Channel 4/5 1.2A Deployment Current (default)
1
Channel 4/5 1.75A Deployment Current
D3
0
Channel 2/3 2ms Deployment Period (default)
1
Channel 2/3 4ms Deployment Period
D2
0
Channel 2/3 1.2A Deployment Current (default)
1
Channel 2/3 1.75A Deployment Current
D1
0
Channel 0/1 2ms Deployment Period (default)
1
Channel 0/1 4ms Deployment Period
D0
0
Channel 0/1 1.2A Deployment Current (default)
1
Channel 0/1 1.75A Deployment Current
Bit
State
Description
D7
0
No Fault: Channel 1
1
Fault Exists: Channel 1
D6
Channel 1
Diagnostic Fault-bit
Refer to Diagnostic Fault-bit Definition table 22
D5
D4
D3
0
No Fault: Channel 0
1
Fault Exists: Channel 0
D2
Channel 0
Diagnostic Fault-bit
Refer to Diagnostic Fault-bit Definition table 22
Obsolete
Product(s)
- Obsolete
Product(s)



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