L9634 datasheet(19/36 Pages) STMICROELECTRONICS

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L9634

Figure 19. Resistance Measurement Diagram

The ADC has a resolution of 8 bits and an accuracy of 5%. The ADC is robust to disruption that may occur

due to adjacent loops short to 40V or -1V.

4.14 MOS Diagnostic

During a MOS test, the IBIAS current source referenced to VBIAS is connected to the SQHx. In case of nor-

mal condition, SQHx and SQLx are equal to VBIAS.

DEPEN pin is asserted in order to run a MOS diagnostic. If DEPEN pin is negated, OSD will inhibit the

high/low side MOS from turning on. In this case, the MOS diagnostic is terminated after tDETECT is expired

and the respective MOS fault bit is set.

4.15 Low Side MOS Diagnostic

Upon detection of the following conditions, OSD turns the low side driver off and terminates the diagnostic

within the specified time, tPROP_DLY.

● VSQL is less than SGth threshold voltage

● (VSQHx - VSQLx) is greater than VI_TH

● VSQH is greater than SBth threshold voltage

Any of the above conditions are considered as a normal operation. Upon detection any of these conditions,

OSD does not set the low side driver fault bits.

On a single channel, high-side and low-side MOS diagnostics is completed within tDETECT. A low-side

MOS fault bit is only set when tDETECT is expired before any of the above conditions are detected. A fault

detection filter, tFLT_DLY, is provided to protect against short-transients on SQH and SQL pins. See Figure

20 for MOS test diagram.

Figure 20. MOS Diagnostic Diagram

SQLx

SQHx

SRC

VIGN

SINK

VRESx

Off

to ADC

Off

gnd0

GNDx

SQLx

SQHx

VRESx

HS Gate

Drive

Diagnostics

LS Gate

Drive

GNDx

gnd0

BIAS

Obsolete

Product(s)

- Obsolete

Product(s)

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