1

PS8546A

07/13/01

GND2

PCICLK_E

X2

PCICLK0

PCICLK1

PCICLK_F

PCICLK2

PCICLK3

PCICLK4/

SEL100/66.6#

VDD3

48MHz

REF0

IOAPIC

VDDLA

CPUCLK1

CPUCLK2

VDDLC

GND

PCI_STOP#

CPU_STOP#

PD#

SPREAD#

GND3

1

2

3

4

5

6

7

8

9

10

11

12

13

14

28

27

26

25

24

23

22

21

20

19

18

17

16

15

GND1

X1

VDD2

CPUCLK0

VDD1

PinConfiguration

BlockDiagram

Description

The PI6C106 is part of a reduced pin count two-chip clock solution

for designs using an Intel BX style chipset. Companion SDRAM

buffersarePI6C182&PI6C184.

There are two PLLs, with the first PLL capable of spread spectum

operation. CPU frequencies up to 100 MHz are supported.

Features

• Three CPUs @2.5V, up to 100 MHz

• Seven PCIs @ 3.3V (including one free running, 1 early)

• One48MHz@3.3Vfixed

• OneREF(3.3V,14.318MHz)

• OneIOAPIC(2.5V,14.318MHz)

• Strong REF clock (1V/ns @50pF load)

• Excellent power management features including

Power Down, PCI, and CPU stops

• Spread Spectrum for EMI control (0.5% down spread)

• EarlyPCI(2.5ns±700ps)

• EnhancedPCICLK4(1.5X)

• 28-pinSSOPPackaging(H)

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PI6C106

28-Pin

H

FrequencyTable

#

6

.

6

6

/

0

0

1

L

E

Sz

H

M

U

P

Cz

H

M

I

C

P

10

0

13

.

3

3

06

.

6

63

.

3

3

IOAPIC

REF0

VDDLA

X1

X2

CPU_STOP#

SPREAD#

OSC

PD#

SEL 100/66.6#

PCI_STOP#

CPUCLK(0:2)

VDDLC

PCICLK_E

PCICLK_F

48MHz

PCICLK(0:4)

CPU

STOP

BUS

STOP#

PLL

Spread

Spectrum

÷2

PLL2

÷3