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HT45F75 Datasheet(PDF) 88 Page - Holtek Semiconductor Inc |
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HT45F75 Datasheet(HTML) 88 Page - Holtek Semiconductor Inc |
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88 / 190 page  Rev. 1.10 88 De�e��e� 1�� �01� Rev. 1.10 89 De�e��e� 1�� �01� HT45F75 Body Fat Scale Flash MCU HT45F75 Body Fat Scale Flash MCU andTnIO0bitsmustbedifferentfromtheinitialvaluesetupusingtheTnOCbit otherwisenochangewilloccurontheTMoutputpinwhenacomparematchoccurs. AftertheTMoutputpinchangesstate,itcanberesettoitsinitiallevelbychanging theleveloftheTnONbitfromlowtohigh. InthePWMMode,theTnIO1andTnIO0bitsdeterminehowtheTMoutputpin changesstatewhenacertaincomparematchconditionoccurs.ThePWMoutput functionismodifiedbychangingthesetwobits.Itisnecessarytochangethevalues oftheTnIO1andTnIO0bitsonlyaftertheTMhasbeenswitchedoff.Unpredictable PWMoutputswilloccuriftheTnIO1andTnIO0bitsarechangedwhentheTMis running. Bit3 TnOC:TPn_0,TPn_1Outputcontrolbit CompareMatchOutputMode 0:Initiallow 1:Initialhigh PWMMode/SinglePulseOutputMode 0:Activelow 1:Activehigh ThisistheoutputcontrolbitfortheTMoutputpin.Itsoperationdependsupon whetherTMisbeingusedintheCompareMatchOutputModeorinthePWMMode/ SinglePulseOutputMode.IthasnoeffectiftheTMisintheTimer/CounterMode.In theCompareMatchOutputModeitdeterminesthelogicleveloftheTMoutputpin beforeacomparematchoccurs.InthePWMModeitdeterminesifthePWMsignalis activehighoractivelow. Bit2 TnPOL:TPn_0,TPn_1OutputpolarityControl 0:Non-invert 1:Invert ThisbitcontrolsthepolarityoftheTPn_0,TPn_1outputpin.Whenthebitissethigh theTMoutputpinwillbeinvertedandnotinvertedwhenthebitiszero.Ithasno effectiftheTMisintheTimer/CounterMode. Bit1 TnCAPTS:TMncapturetriggersourceselect 0:FromTPn_0,TPn_1pin 1:FromTCKnpin Bit0 TnCCLR:SelectTMnCounterclearcondition 0:TMnComparatrorPmatch 1:TMnComparatrorAmatch Thisbitisusedtoselectthemethodwhichclearsthecounter.Rememberthatthe PeriodicTMcontainstwocomparators,ComparatorAandComparatorP,eitherof whichcanbeselectedtocleartheinternalcounter.WiththeTnCCLRbitsethigh, thecounterwillbeclearedwhenacomparematchoccursfromtheComparatorA. Whenthebitislow,thecounterwillbeclearedwhenacomparematchoccursfrom theComparatorPorwithacounteroverflow.Acounteroverflowclearingmethodcan onlybeimplementediftheCCRPbitsareallclearedtozero.TheTnCCLRbitisnot usedinthePWM,SinglePulseorInputCaptureMode. PTMnDL Register (n=1 or 2) Bit 7 6 5 4 3 2 1 0 Na�e D7 D� D5 D� D3 D� D1 D0 R/W R R R R R R R R POR 0 0 0 0 0 0 0 0 Bit7~0 PTMnDL:TMnCounterLowByteRegisterbit7~bit0 TMn10-bitCounterbit7~bit0 |
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