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HT45F75 Datasheet(PDF) 107 Page - Holtek Semiconductor Inc |
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HT45F75 Datasheet(HTML) 107 Page - Holtek Semiconductor Inc |
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107 / 190 page  Rev. 1.10 10� De�e��e� 1�� �01� Rev. 1.10 107 De�e��e� 1�� �01� HT45F75 Body Fat Scale Flash MCU HT45F75 Body Fat Scale Flash MCU ADCS Register Bit 7 6 5 4 3 2 1 0 Na�e — — — ADCK� ADCK3 ADCK� ADCK1 ADCK0 R/W — — — R/W R/W R/W R/W R/W POR — — — 0 0 0 0 0 Bit7~5 Unimplemented,readas“0” Bit4~0 ADCK4~ADCK0:SelectADCclocksource(fMCLK) 00000~11110:fSYS/2/(ADCK[4:0]+1) 11111:fSYS DuetotheADCclocksource,fMCLK,istypicallydesignedas4.8MHzandtheMCU mightbeselectedtoworkatdifferentsystemclock,therefore,thedesignershould usetheADCK4~ADCK0bitstogetthefixed4.8MHzADCworkingclocksource. Forexample,ifthesystemclockis9.6MHz,theADCK[4:0]mustbe0togetthe fMCLK=4.8MHz. A/D Operation TheADCprovidesthreeoperationalmodes,whicharePowerdownmode,SleepmodeandReset mode,controlledrespectivelybytheADOFF,ADSLPandADRSTbitsintheADCR0register.The followingtableillustratestheoperatingmodeselection. ADOFF ADSLP ADRST Operating mode Description 1 x x Powe� down �ode PGA off� ADC off 0 1 x Sleep �ode PGA on� ADC off 0 0 1 Reset �ode PGA on� ADC on� SINC Reset “x” unknown A/D operation mode selection ToenabletheADC,thefirststepistodisabletheADCpowerdownandsleepmode,tomakesure theADCispoweredup.TheADRSTbitintheADCR0registerisusedtostartandresettheA/D converterafterpoweron.Whenthemicrocontrollersetsthisbitfromlowtohighandthenlow again,ananalogtodigitalconverteddatainSINCfilterwillbeinitiated.Afterthissetupiscomplete, theADCisreadyforoperation.Thesethreebitsareusedtocontroltheoverallstartoperationofthe internalanalogtodigitalconverter. TheEOCbitintheADCR1registerisusedtoindicatewhentheanalogtodigitalconversionprocess iscomplete.Thisbitwillbeautomaticallysethighbythemicrocontrollerafteraconversioncycle hasended.Inaddition,thecorrespondingA/Dinterruptrequestflagwillbesetintheinterrupt controlregister,andiftheinterruptsareenabled,anappropriateinternalinterruptsignalwillbe generated.ThisA/DinternalinterruptsignalwilldirecttheprogramflowtotheassociatedA/D internalinterruptaddressforprocessing.IftheA/Dinternalinterruptisdisabled,themicrocontroller canbeusedtopolltheEOCbitintheADCR1registertocheckwhetherithasbeenset“1”asan alternativemethodofdetectingtheendofanA/Dconversioncycle.TheADCconverteddatawill beupdatedcontinuouslybythenewconverteddata.IftheADCconverteddatalatchfunctionis enabled,thelatestconverteddatawillbelatchedandthefollowingnewconverteddatawillbe discardeduntilthisdatalatchfunctionisdisabled. TheclocksourcefortheA/Dconvertershouldbetypicallyfixedatavalueof4.8MHz,which originatesfromthesystemclockfSYS,andcanbechosentobeeitherfSYSorasubdividedversion offSYS.ThedivisionratiovalueisdeterminedbytheADCK4~ADCK0bitsintheADCSregisterto obtaina4.8MHzclocksourcefortheADC. ThedifferentialreferencevoltagesupplytotheA/DConvertercanbesuppliedfromeitherthe internalpowersupplypins,VCMandAVSS,orfromanexternalreferencesourcesuppliedonpins, VREFPandVREFN.ThedesiredselectionismadeusingtheVREFSbitintheADCR0register. |
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