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HT24LC128 Datasheet(PDF) 4 Page - Holtek Semiconductor Inc |
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HT24LC128 Datasheet(HTML) 4 Page - Holtek Semiconductor Inc |
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4 / 12 page  Rev. 1.10 4 March 12, 2015 HT24LC128 Functional Description Pin Function • Serialclock–SCL ThepositiveedgeoftheSCLinputisusedtoclock dataintotheEEPROMdevice.Thenegativeedge isusedtoclockdataoutofthedevice. • Serialdata–SDA The SDA pin is bidirectional for serial data transfer.Thepinisopendraindrivenandmaybe wired-ORwithanynumberofotheropendrainor opencollectordevices. • AddressInputs–A0,A1,A2 TheA2,A1andA0pinsaredeviceaddressinputs thatarehardwiredorleftnotconnected.Whenthe pinsarehardwired,asmanyaseight128Kdevices maybeaddressedonasinglebussystem(device addressingisdiscussedindetailundertheDevice Addressingsection).Thecodefortheselected deviceissetupbyconnectingtheseinputstoeither VSSorVCC.Ifanypinisleftunconnectedina floatingstatewillbeinternallyreadashavinga lowinput,VSS,value. • Writeprotect–WP The HT24LC128 has a write protect pin that provides hardwaredataprotection.Thewrite protectpinallowsnormalread/writeoperations whenconnectedtoVSSorleftfloating.Whenthe writeprotectpinisconnectedtoVCC,thewrite protectionfeatureisenabledandoperatesasshown inthefollowingtable. WP Pin Status Protect Array VCC Full Array – 128K VSS or floating Normal Read/Write Operations Memory Structure Thedeviceisinternallystructuredinto16K8-bit words.A14-bitdatawordaddressisrequiredfor wordaddressing. Device Operation • Clockanddatatransition Datatransfermaybeinitiatedonlywhenthebus isnotbusy.Duringdatatransfer,thedataline mustremainstablewhenevertheclocklineis high.Changesinthedatalinewhiletheclockline ishighwillbeinterpretedasaSTARTorSTOP condition. • Startcondition Ahigh-to-lowtransitionofSDAwithSCLhigh isastartconditionwhichmustprecedeanyother command (refer to Start and Stop Definition Timingdiagram). • Stopcondition Alow-to-hightransitionofSDAwithSCLhighis astopcondition.Afterareadsequence,thestop commandwillplacetheEEPROMinastandby powermode(refertoStartandStopDefinition TimingDiagram). • Acknowledge All addresses and data words are serially transmittedtoandfromtheEEPROMin8-bit words.TheEEPROMsendsazerotoacknowledge thatithasreceivedeachword.Thishappensduring theninthclockcycle. SDA SCL Data allowed to change Start condition Stop condition No ACK state Address or acknowledge valid Start and Stop Definition Timing diagram Device Addressing The128KEEPROMdevicerequiresan8-bitdevice addresswordfollowingastartconditiontoenablethe chipforareadorwriteoperation.Thedeviceaddress wordconsistsofamandatoryone,zerosequencefor thefirstfourmostsignificantbits(refertothediagram showingtheDeviceAddress).Thisiscommontoall theEEPROMdevices. The128KEEPROMusesthethreedeviceaddress bitsA2,A1,A0toallowasmanyaseightdevices onthesamebus.Thesebitsarecomparedtotheir correspondinghardwiredinputpins. The8thbitdeviceaddressistheread/writeoperation selectbit.Areadoperationisinitiatedifthisbitis highandawriteoperationisinitiatedifthisbitislow. Ifthecomparisonofthedeviceaddressissuccessful, theEEPROMwilloutputazeroACKbit.Ifnot,the devicewillreturntothestandbystate. 10 A2 A1 A0 10 De vi ce A dd re ss R/ W |
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