13

RT2660

DS2660-00

September 2015

www.richtek.com

©

Copyright 2015 Richtek Technology Corporation. All rights reserved.

is a registered trademark of Richtek Technology Corporation.

Application Information

The RT2660 employs current mode COT architecture that

provides ease of use, low external component count and

fast transient response. The Synchronous buck regulator

capable of delivering up to 6A continuous current and set

switching frequency up to 1MHz.

Some feature of Current mode COT



Effective bandwidth is very high



No slope compensation necessary



Double complex zero at half the switching frequency

term of fixed frequency peak CM converter disappears.

Operation of Current Mode COT

between the reference voltage and the feedback voltage.

current). The PWM comparator senses where the two

waveforms cross and triggers the on time generator.

Time (µs)

t

Current Feedback

Figure 1. Current Mode COT Waveforms

Adaptive Constant On-Time Control

Adaptive on time generator makes the system operate in

improves COT by making the one-shot on-time proportional

on-time is chosen as approximately what it would be for

an ideal fixed-frequency PWM in similar input/output

voltage conditions.

The on-time calculates equation of the buck converter as

shows as follows :

OUT

ON

IN

SW

V

t

VF





Non-Droop Mode Operation

The RT2660 can be configured as a non-droop solution.

The benefit of a non-droop approach is that load regulation

is flat, therefore, in a system where tight DC tolerance is

desired, the non-droop approach is recommended. For

the Intel system agent application, non-droop is

recommended as the standard configuration. The non-

droop approach can be implemented by connecting a

resistor and a capacitor between the COMP and the VREF

pins. The purpose of the type II compensation is to obtain

high DC feedback gain while minimizing the phase delay

at unity gain cross over frequency of the converter.

desired unity gain bandwidth of the converter, and the value

but recommended. Its appropriate capacitance value can

be calculated using the desired pole location.

Figure 2 shows the basic implementation of the non-droop

mode using the RT2660.

Figure 2. Non-Droop Mode

Droop Mode Operation

The terminology for droop is the same as load line or

voltage positioning

as defined in the Intel CPU VCORE

specification. Based on the actual tolerance requirement

of the application, load-line set points can be defined to

maximize either cost savings (by reducing output

capacitors) or power reduction benefits.

Accurate droop voltage response is provided by the finite

gain of the droop amplifier. The equation for droop voltage

is shown below Equation :

Where

+

-

+

-

+

-

LS

RCS

VREFIN

gm

+

-

PWM

Comparator

COMP

Driver

VREF

+

-

VREF

VOUT

SW

HS

LS

ESR

VIN

+

-

VREF