RT9750WSC datasheet(11/30 Pages) RICHTEK

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RT9750

DS9750-01 June 2017

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is a registered trademark of Richtek Technology Corporation.

disable this protection function by I2C (0x05 bit2). Use

also can set the threshold by I2C (0x11).

Pull Up

TVBUS

3. VBAT Over-Temperature Protection

(TSBAT_OTP)

As below picture, user need to place an external NTC

voltage dived circuit at TSBAT pin. When the voltage of

TSBAT pin is over the threshold, the device will turn off

load switch and set CHG_EN bit to 0. User can enable or

disable this protection function by I2C (0x05 bit1). Use

also can set the threshold by I2C (0x12).

Pull Up

TSBAT

4. IBUS Reverse Current Protection (IBUS_ IREV)

The device implement a reverse current protection function

to turn off load switch when the reverse current is detected

(current flow from VOUT to VBUS). The device set CHG_EN

to “0” when this event is detected. The user can set the

protection level and deglitch time by I2C (0x26 set level,

0x27 set deglitch).

5. Dropout Voltage Protection (VDROP_OVP)

VDROP is the voltage different between VBUS and VOUT.

The device implement two VDROP threshold for user to

set by I2C. One is VDROP_LAM and the other on is

VDROP_OVP. User can use these thresholds to monitor

the health of load switch. When the VDROP_ALM

threshold be triggered the device assert INT pin low to

alert the host. If VDROP_OVP threshold is be triggered

the device will turn off the load switch and set CHG_EN

bit to “0”.

Due to the VDROP_ALM is an alarm signal, user should

set VDROP_OVP threshold higher than VDROP_ALM.

6. Junction Thermal Shutdown (TSHUT_FLT)

The device will turn off load switch and set CHG_EN bit to

“0” if the threshold of junction temperature shutdown is

triggered. If the junction thermal shutdown is triggered

device asserted INT low to alert the host (no mask for

TSHUT_FLT) and also set the TSHUT_FLT bit to “1”.

7. IBUS Over-Current protection (IOC_FLT)

The device monitor the current flow from VBUS to VOUT.

If the current over the threshold the device has two

protection option for user to select by I2C. If user set

OCP_RES bit “0” (blanking mode), the device will turn

off load switch and set CHG_EN to “0” when IBUS current

over IOC threshold. If user set OCP_RES bit “1” (hiccup

mode), load switch is disabled instantaneously, and the

device will attempt to turn on the load switch wait 250μs

to check OCP and turn off every 100ms, up to 7 times

before latching off.

I2C Interface Timing Diagram

The RT9750 acts as an I2C- bus slave. The I2C-bus master

configures the settings for charge mode by sending

command bytes to the RT9750 via the 2-wire7 I2C-bus.

After the START condition the I2C master sends a chip

address. This address is seven bits long followed by an

eighth bit which is a data direction bit(R/W). The second

byte selects the register to which the data will be written.

The third byte contains data to the selected register.

RT9750WSC Datasheet(PDF) 11 Page - Richtek Technology Corporation

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