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RT5028 Datasheet(PDF) 13 Page - Richtek Technology Corporation |
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RT5028 Datasheet(HTML) 13 Page - Richtek Technology Corporation |
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13 / 40 page ![]() 13 DS5028-02 September 2016 www.richtek.com RT5028 © Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. Read Function Reading One Indexed Byte of Data from RT (With 1-Byte) Application Information The RT5028 is a highly-integrated solution for industrial system including PMIC and memory system. The RT5028 application mechanism and I2C compatible interface are introduced in later sections. The system's slave address is 0110111 (As SADDR = high) or 0111111(As SADDR = low). PMIC - Power management system provides 8 low dropout linear regulator and 4 high efficiency synchronous step- down DC-DC converters. Power-On and Power-Off sequences are control by PWRON and RESET input pins. S Slave Address 0 A Register Address A Data Byte A P R/W Acknowledge from RT Acknowledge from RT Acknowledge from Master Sr Slave Address 1 A Acknowledge from RT Repeated Start R/W 1Byte Reading n Indexed Words of Data from RT (With N-Byte) S Slave Address 0 A Register Address A Data Byte A Data Byte A P Acknowledge from RT Acknowledge from RT Acknowledge from Master Acknowledge from Master Sr Slave Address 1 A Acknowledge from RT Repeated Start Data Byte A Data Byte A Acknowledge from Master Acknowledge from Master …… R/W R/W 1st Byte 2nd Byte (n-1)th Byte nth Byte Detail time sequence control is described in Power ON/ OFF diagram. The I2C interface can program individual regulator output voltage as well as on/off control and voltage setting. I2C Interface Timing Diagram The RT5028 acts as an I 2C -bus slave. The I2C-bus master configures the settings for all function blocks by sending command bytes to the RT5028 via the 2-wire I 2C-bus. The I 2C timing diagrams are list in the following. Write Function Writing One Byte of Data to RT (With 1-Byte) S Slave Address 0 A Register Address A Data Byte A P R/W Acknowledge from RT Acknowledge from RT Acknowledge from RT 1Byte Writing n Bytes of Data to RT (With N-Byte) S Slave Address 0 A Register Address A Data Byte A Data Byte A P Acknowledge from RT Acknowledge from RT Acknowledge from RT Acknowledge from RT A Acknowledge from RT R/W (n-1)th Byte nth Byte Data Byte 1st Byte A Acknowledge from RT Data Byte 2nd Byte … |
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