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ICS97U877 Datasheet(PDF) 10 Page - Integrated Circuit Systems |
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ICS97U877 Datasheet(HTML) 10 Page - Integrated Circuit Systems |
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10 / 13 page ![]() 10 ICS97U877 0792A—04/15/04 Figure 9. Dynamic Phase Offset Figure 10. Time delay between OE and Clock Output (Y, Y) t ( ) t ( ) FBIN FBIN CK CK t ( )dyn t ( )dyn t ( )dyn t ( )dyn SSC OFF SSC ON SSC ON SSC OFF 50% VDDQ ten tdis OE OE Y/ Y Y 50% VDDQ Y Y Y 50% VDDQ 50 % VDDQ |
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