SC16C754 datasheet(7/49 Pages) PHILIPS

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Philips Semiconductors

SC16C754

Quad UART with 64-byte FIFO

Product data

Rev. 04 — 19 June 2003

7 of 49

9397 750 11618

IOW

1118I

Input/Output Write strobe (Active-LOW). A LOW-to-HIGH transition on

IOW will transfer the contents of the data bus (D0-D7) from the external

CPU to an internal register that is deﬁned by address bits A0-A2 and CSA

and CSD.

1, 2, 20,

21, 22,

27, 40,

41, 42,

60, 61,

62, 80

Not connected.

RESET

Reset. This pin will reset the internal registers and all the outputs. The

UART transmitter output and the receiver input will be disabled during reset

time. RESET is an active-HIGH input.

RIA, RIB,

RIC, RID

78, 24,

38, 64

8, 28,

42, 62

Ring Indicator (Active-LOW). These inputs are associated with individual

UART channels, A through D. A logic 0 on these pins indicates the modem

has received a ringing signal from the telephone line. A LOW-to-HIGH

transition on these input pins generates a modem status interrupt, if

enabled. The state of these inputs is reﬂected in the modem status register

(MSR).

RTSA, RTSB,

RTSC, RTSD

7, 15,

47, 55

14, 22,

48, 56

Request to Send (Active-LOW). These outputs are associated with

individual UART channels, A through D. A logic 0 on the RTS pin indicates

the transmitter has data ready and waiting to send. Writing a logic 1 in the

modem control register MCR[1] will set this pin to a logic 0, indicating data

is available. After a reset these pins are set to a logic 1. These pins only

affect the transmit and receive operations when Auto-RTS function is

enabled via the Enhanced Feature Register (EFR[6]) for hardware ﬂow

control operation.

RXA, RXB,

RXC, RXD

77, 25,

37, 65

7, 29,

41, 63

Receive data input. These inputs are associated with individual serial

channel data to the SC16C754. During the local loop-back mode, these RX

input pins are disabled and TX data is connected to the UART RX input

internally.

RXRDY

3438O

Receive Ready (Active-LOW). RXRDY contains the wire-ORed status of

all four receive channel FIFOs, RXRDY A-D. It goes LOW when the trigger

level has been reached or a time-out interrupt occurs. It goes HIGH when all

RX FIFOs are empty and there is an error in RX FIFO.

TXA, TXB,

TXC, TCD

10, 12,

50, 52

17, 19,

51, 53

Transmit data. These outputs are associated with individual serial transmit

channel data from the SC16C754. During the local loop-back mode, the TX

output pin is disabled and TX data is internally connected to the UART RX

input.

TXRDY

3539O

Transmit Ready (Active-LOW). TXRDY contains the wire-ORed status of

all four transmit channel FIFOs, TXRDY A-D. It goes LOW when there are a

trigger level number of spaces available. It goes HIGH when all four TX

buffers are full.

Table 2:

Pin description…continued

Symbol

Type

Description

LQFP80 PLCC68

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