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MIC5254 Datasheet(PDF) 9 Page - Micrel Semiconductor |
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MIC5254 Datasheet(HTML) 9 Page - Micrel Semiconductor |
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9 / 11 page ![]() September 2003 9 MIC5254 MIC5254 Micrel Applications Information Enable/Shutdown The MIC5254 comes with an active-high enable pin for each regulator that allows the regulator to be disabled. Forcing the enable pin low disables the regulator and sends it into a “zero” off-mode-current state. In this state, current consumed by the regulator goes nearly to zero. Forcing the enable pin high enables the output voltage. This part is CMOS and the enable pin cannot be left floating; a floating enable pin may cause an indeterminate state on the output. Input Capacitor The MIC5254 is a high performance, high bandwidth device. Therefore, it requires a well-bypassed input supply for opti- mal performance. A 1µF capacitor is required from the input to ground to provide stability. Low ESR ceramic capacitors provide optimal performance at a minimum of space. Addi- tional high-frequency capacitors, such as small-valued NPO dielectric type capacitors, help filter out high frequency noise and are good practice in any RF based circuit. Output capacitor The MIC5254 requires an output capacitor for stability. The design requires 1µF or greater on the output to maintain stability. The design is optimized for use with low ESR ceramic chip capacitors. High ESR capacitors may cause high frequency oscillation. The maximum recommended ESR is 300mΩ. The output capacitor can be increased, but performance has been optimized for a 1µF ceramic output capacitor and does not improve significantly with larger capacitance. X7R/X5R dielectric-type ceramic capacitors are recom- mended because of their temperature performance. X7R- type capacitors change capacitance by 15% over their oper- ating temperature range and are the most stable type of ceramic capacitors. Z5U and Y5V dielectric capacitors change value by as much as 50% and 60% respectively over their operating temperature ranges. To use a ceramic chip capaci- tor with Y5V dielectric, the value must be much higher than an X7R ceramic capacitor to ensure the same minimum capaci- tance over the equivalent operating temperature range. Error Flag The error flag output is an active-low, open-drain output that drives low when a fault condition AND an undervoltage detection occurs. Internal circuitry intelligently monitors overcurrent, overtemperature and dropout conditions and ORs these outputs together to indicate some fault condition. The output of that OR gate is ANDed with an output voltage monitor that detects an undervoltage condition. That output drives the open-drain transistor to indicate a fault. This prevents chattering or inadvertent triggering of the error flag. The error flag must be pulled-up using a resistor from the flag pin to either the input or the output. The error flag circuit was designed essentially to work with a capacitor to ground to act as a power-on reset generator, signaling a power-good situation once the regulated voltage was up and/or out of a fault condition. This capacitor delays the error signal from pulling high, allowing the downstream circuits time to stabilize. When the error flag is pulled-up to the input without using a pull-down capacitor, there can be a glitch on the error flag upon start up of the device. This is due to the response time of the error flag circuit as the device starts up. When the device comes out of the “zero” off mode current state, all the various nodes of the circuit power up before the device begins supplying full current to the output capacitor. The error flag drives low immediately and then releases after a few microseconds. The intelligent circuit that triggers an error detects the output going into current limit AND the output being low while charging the output capacitor. The error output then pulls low for the duration of the turn-on time. A capacitor from the error flag to ground will filter out this glitch. The glitch does not occur if the error flag pulled up to the output. Active Shutdown The MIC5254 also features an active shutdown clamp, which is an N-Channel MOSFET that turns on when the device is disabled. This allows the output capacitor and load to dis- charge, de-energizing the load. No Load Stability The MIC5254 will remain stable and in regulation with no load unlike many other voltage regulators. This is especially important in CMOS RAM keep-alive applications. Thermal Considerations The MIC5254 is a dual LDO voltage regulator designed to provide two output voltages from one package. Both regula- tor outputs are capable of sourcing 150mA of output current. Proper thermal evaluation needs to be done to ensure that the junction temperature does not exceed it’s maximum value, 125°C. Maximum power dissipation can be calculated based on the output current and the voltage drop across each regulator. The sum of the power dissipation of each regulator determines the total power dissipation. The maximum power dissipation that this package is capable of handling can be determined using thermal resistance, junction to ambient, and the following basic equation: P TT D(max) J(max) A JA = − θ T J(max) is the maximum junction temperature of the die, 125°C and TA is the ambient operating temperature of the die. θJA is layout dependent. Table 1 shows the typical thermal resistance for a minimum footprint layout for the MIC5254. Package θ θθ θ θJA at Recommended Minimum Footprint MSOP-10 200°C/W Table 1. Thermal Resistance The actual power dissipation of each regulator output can be calculated using the following simple equation: P D = (VIN – VOUT)IOUT + VIN × IGND Each regulator contributes power dissipation to the overall power dissipation of the package. P D(total) = PD(reg1) + PD(reg2) |
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