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MPC9443 Datasheet(PDF) 7 Page - Motorola, Inc

Part # MPC9443
Description  2.5V AND 3.3V LVCMOS CLOCK FANOUT BUFFER
PDF  16 Pages
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Manufacturer  MOTOROLA [Motorola, Inc]
Direct Link  http://www.freescale.com
Logo MOTOROLA - Motorola, Inc

MPC9443 Datasheet(HTML) 7 Page - Motorola, Inc

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MPC9443
TIMING SOLUTIONS
7
MOTOROLA
Table 11: DC Characteristics
(VCC = 3.3V ± 5%, any VCCA,B,C,D = 2.5V ± 5% or 3.3V ± 5% (mixed), TA = –40 to +85°C)
Symbol
Characteristics
Min
Typ
Max
Unit
Condition
VIH
Input high voltage
2.0
VCC + 0.3
V
LVCMOS
VIL
Input low voltage
-0.3
0.8
V
LVCMOS
IIN
Input currenta
200
µA
VOH
Output High Voltage
2.5V output
3.3V output
1.7
2.0
V
IOH= -15 mAb
IOH= -24 mAb
VOL
Output Low Voltage
2.5V output
3.3V output
0.6
0.55
V
IOL= 15 mAb
IOL= 24 mAb
VPP
Peak-to-peak input voltage
PCLK0,1
250
mV
LVPECL
VCMRc
Common Mode Range
PCLK0,1
1.1
VCC-0.6
V
LVPECL
ZOUT
Output impedance
2.5V output
3.3V output
22
19
W
W
CPD
Power Dissipation Capacitance
10
pF
Per Output
ICCQd
Maximum Quiescent Supply Current
2.0
mA
All VCC Pins
a.
Input pull-up / pull-down resistors influence input current.
b.
The MPC9443 is capable of driving 50
Ω transmission lines on the incident edge. Each output drives one 50Ω parallel terminated
transmission line to a termination voltage of VTT. Alternatively, the device drives up to two 50Ω series terminated transmission lines
(for VCC=3.3V) or one 50
Ω series terminated transmission line (for VCC=2.5V).
c.
VCMR (DC) is the crosspoint of the differential input signal. Functional operation is obtained when the crosspoint is within the VCMR range
and the input swing lies within the VPP (DC) specification.
d.
ICCQ is the DC current consumption of the device with all outputs open and the input in its default state or open.
Table 12: AC Characteristics
(VCC = 3.3V ± 5%, any VCCA,B,C,D = 2.5V ± 5% or 3.3V ± 5% (mixed), TA = –40 to +85°C)a b
Symbol
Characteristics
Min
Typ
Max
Unit
Condition
tsk(LH, HL)
Output-to-output SkewcAny output, same output divider
Any output, any output divider
275
350
ps
ps
tsk(PP)
Device-to-device Skew
See 3.3V AC table
tPLH, HL
Propogation Delay
See 3.3V AC table
tSK(P)
DCQ
Output pulse skewd
Using PCLK0,1
Using CCLK
Output Duty Cycle
fQ<140 MHz and using CCLK
fQ<250 MHz and using PCLK0,1
45
45
50
50
400
500
55
55
ps
ps
%
%
DCREF = 50%
a.
AC characteristics apply for parallel output termination of 50
Ω to VTT.
b.
This table only specifies AC parameter im mixed voltage supply conditions that vary from the corresponding AC tables. All other
parameters, see the 3.3V (for 3.3V outputs) or 2.5V AC table (for 2.5V outputs).
c.
tsk(LH, HL) includes both device skew referenced to the rising output edge and device skew referenced to the falling output edge.
d.
Output pulse skew is the absolute difference of the propagation delay times: | tpLH - tpHL |.
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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