LT3420 datasheet(6/20 Pages) LINER

6 / 20 page

LT3420/LT3420-1

3420fa

PI FU CTIO S

RREF (Pin 1): Reference Resistor Pin. Place a resistor (R2)

from the RREF pin to GND. 2k is recommended.

VBAT (Pin 2): Battery Voltage Input. This pin should be

connected to the power supply or battery, which supplies

power to transformer T1. Must be locally bypassed.

RFB (Pin 3): Feedback Resistor Pin. Place a resistor (R1)

from the SW pin to the RFB pin. Set R1 according to the

following formula:

RN V

SEC

OUT

[]

(. •

)

(

) (LT3420)

RN V

SEC

OUT

[]

()

(

) (LT3420-1)

VOUT : Desired Output Voltage

N: Transformer Turns Ratio

RSEC: Transformer Secondary Resistance

VD: Diode Forward Voltage Drop

R2: Resistor from the RREF Pin to GND. 2k is a Typical

Choice

VCC (Pin 4): Input Supply Pin. Must be locally bypassed

with a 4.7

µF or larger ceramic capacitor.

GND (Pin 5): Ground. Tie directly to local ground plane.

SW (Pin 6): Switch Pin. This is the collector of the internal

NPN power switch. Minimize the metal trace area con-

nected to this pin to minimize EMI.

SEC (Pin 7): Transformer Secondary Pin. Tie one end of

the transformer secondary to this pin. Take care to use the

correct phasing of the transformer (Refer to Figures 1

and 2).

DONE (Pin 8): Done Output Pin. Open collector NPN

output. DONE is pulled low whenever the chip is delivering

power to the output and goes high when power delivery

stops.

CHARGE (Pin 9): Charge Pin. Drive CHARGE high (1.5V or

more) to commence charging of the output capacitor.

Drive to 0.2V or less to put the part in shutdown mode.

CT (Pin 10): Refresh Timer Capacitor Pin. Place a capacitor

from the CT pin to GND to set the refresh timer sample rate

according to the following formula:

CT = 2.5 • 10–6 • tREFRESH

tREFRESH: Desired Refresh Period in Seconds.

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