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AD7626 Datasheet(PDF) 7 Page - Analog Devices

Part # AD7626
Description  16-Bit, 10 MSPS, PulSAR Differential ADC
PDF  30 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD7626 Datasheet(HTML) 7 Page - Analog Devices

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AD7626
Data Sheet
Rev. D | Page 6 of 29
TIMING SPECIFICATIONS
VDD1 = 5 V; VDD2 = 2.5 V; VIO = 2.37 V to 2.63 V; REF = 4.096 V; all specifications TMIN to TMAX, unless otherwise noted.
Table 3.
Parameter
Symbol
Min
Typ
Max
Unit
Time Between Conversions1
tCYC
100
10,000
ns
Acquisition Time
tACQ
40
ns
CNV High Time
tCNVH
10
40
ns
CNV to D (MSB) Ready
tMSB
100
ns
CNV to Last CLK (LSB) Delay
tCLKL
72
ns
CLK Period2
tCLK
3.33
4
(tCYC − tMSB + tCLKL)/n
ns
CLK Frequency
fCLK
250
300
MHz
CLK to DCO Delay (Echoed Clock Mode)
tDCO
0
4
7
ns
DCO to D Delay (Echoed Clock Mode)
tD
0
1
ns
CLK to D Delay
tCLKD
0
4
7
ns
1
The maximum time between conversions is 10,000 ns. If CNV± is left idle for a time greater than the maximum value of tCYC, the subsequent conversion result is invalid.
2
For the maximum CLK period, the window available to read data is tCYC − tMSB + tCLKL. Divide this time by the number of bits (n) to be read giving the maximum CLK±
frequency that can be used for a given conversion CNV frequency. In echoed clock interface mode, n = 16; in self clocked interface mode, n = 18.



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