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AD9262EBZ Datasheet(PDF) 18 Page - Analog Devices

Part # AD9262EBZ
Description  30 MSPS to 160 MSPS Dual Continuous Time Sigma-Delta ADC
PDF  33 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9262EBZ Datasheet(HTML) 18 Page - Analog Devices

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AD9262
Rev. A | Page 17 of 32
Input Common Mode
The analog inputs of the AD9262 are not internally dc biased. In
ac-coupled applications, the user must provide this bias externally.
Setting the device such that VCM = AVDD is recommended for
optimum performance. The analog inputs are 500 Ω resistors,
and the internal reference loop aims to develop 0.5 V across
each input resistor (see Figure 44). With 0 V differential input,
the driver sources 1 mA into each analog input.
TO LOOP FILTER
STAGE 2
DAC
AVDD – 0.5V
500Ω
500Ω
VIN+x
VIN–x
FROM QUANTIZER
VCM =AVDD
VIN p-p = 2V
Figure 44. Input Common Mode
Differential Input Configurations
The AD9262 can also be configured for differential inputs. The
ADA4937-2 differential driver provides excellent performance
and a flexible interface to the ADC. The output common-mode
voltage of the ADA4937-2 is easily set by connecting AVDD to
the VOCM2 pin of the ADA4937-2 (see Figure 45). The noise and
linearity of the ADA4937-2 need important consideration because
the system performance may be limited by the ADA4937-2.
11
6
7
13
12
9
15
200Ω
200Ω
200Ω
60.4Ω
49.9Ω
50Ω
SIGNAL
SOURCE
2V p-p
RT
60.4
VS
VIN–x
VIN+x
0.1µF
0.1µF
0.1µF
0.1µF
+5V
AVDD
–5V
+1.8V
ADA4937-2
AD9262
VOCM2
Figure 45. Differential Input Configuration Using the ADA4937-2
For frequencies offset from dc, where SNR is a key parameter,
differential transformer coupling is the recommended input
configuration. An example is shown in Figure 46. The center
tap of the secondary winding of the transformer is connected to
AVDD to bias the analog input.
The signal characteristics must be considered when selecting a
transformer. Most RF transformers saturate at frequencies
below a couple of megahertz (MHz), and excessive signal power
can cause core saturation, which leads to distortion.
50Ω
SIGNAL
SOURCE
2V p-p
1:1
RT
50Ω
VS
VIN–x
VIN+x
0.1µF
AVDD
AD9262
Figure 46. Differential Transformer Configuration
Voltage Reference
A stable and accurate 0.5 V voltage reference is built into the
AD9262. The reference voltage should be decoupled to minimize
the noise bandwidth using a 10 μF capacitor. The reference is
used to generate a bias current into a matched resistor such that,
when used to bias the current in the feedback DAC, a voltage
of AVDD − 0.5 V is developed at the internal side of the input
resistors (see Figure 47). The current bias circuit should also be
decoupled on the CFILT pin with a 10 μF capacitor. For this
reason, the VREF voltage should always be 0.5 V.
AVDD
AVDD – 0.5V
CFILT
AVDD – 0.5V
500Ω
TO LOOP
FILTER
STAGE 2
500Ω
VIN+x
VCM =AVDD
VIN p-p = 2V
VIN–x
500Ω
10kΩ
10µF
0.5V
VREF
10µF
REF
Figure 47. Voltage Reference Loop
Internal Reference Connection
To minimize thermal noise, the internal reference on the AD9262
is an unbuffered 0.5 V. It has an internal 10 kΩ series resistor,
which, when externally decoupled with a 10 μF capacitor, limits
the noise (see Figure 48). The unbuffered reference should not
be used to drive any external circuitry. The internal reference is
used by default and when Serial Register 0x18[6] is reset.
10kΩ
2.85kΩ
8.5kΩ
3.5kΩ
0.5V
TO CURRENT
GENERATOR
10µF
Figure 48. Internal Reference Configuration



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