TMS416809, TMS417809

2097152-WORD BY 8-BIT HIGH-SPEED DRAMS

SMKS885A – DECEMBER 1995 – REVISED MARCH 1996

16

POST OFFICE BOX 1443

PARAMETER MEASUREMENT INFORMATION

RAS

CAS

Address

W

OE

DQ0 – DQ7

Row

Column

Don’t Care

Don’t Care

Don’t Care

Data

Out

Don’t Care

Don’t Care

Data

In

tT

tRP

tT

tCAH

tASC

tRAH

tASR

tRAD

tRCS

tRWL

tWP

tDS

tDH

tAA

tCLZ

tOEA

tOEZ

tOED

tOEH

See Note A

tCWL

Hi-Z

tRCD

tRWC

tRAS

tCAS

tCRP

tCP

tRWD

tAWD

tCWD

tCAC

tRAC

NOTE A: Output can go from the high-impedance state to an invalid-data state prior to the specified access time.

Figure 5. Read-Write-Cycle Timing