HD6473048 datasheet(3/867 Pages) HITACHI

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Contents

Section 1

Overview......................................................................................................

1.1

Overview.........................................................................................................................

1.2

Block Diagram................................................................................................................5

1.3

Pin Description ...............................................................................................................

1.3.1

Pin Arrangement .............................................................................................

1.3.2

Pin Assignments in Each Mode ......................................................................

1.3.3

Pin Functions .................................................................................................. 10

Section 2

CPU ............................................................................................................... 15

2.1

Overview......................................................................................................................... 15

2.1.1

Features........................................................................................................... 15

2.1.2

Differences from H8/300 CPU ....................................................................... 16

2.2

CPU Operating Modes.................................................................................................... 17

2.3

Address Space................................................................................................................. 18

2.4

Register Configuration.................................................................................................... 19

2.4.1

Overview......................................................................................................... 19

2.4.2

General Registers............................................................................................ 20

2.4.3

Control Registers ............................................................................................ 21

2.4.4

Initial CPU Register Values ............................................................................ 22

2.5

Data Formats................................................................................................................... 23

2.5.1

General Register Data Formats....................................................................... 23

2.5.2

Memory Data Formats .................................................................................... 25

2.6

Instruction Set ................................................................................................................. 26

2.6.1

Instruction Set Overview ................................................................................ 26

2.6.2

Instructions and Addressing Modes................................................................ 27

2.6.3

Tables of Instructions Classified by Function................................................. 28

2.6.4

Basic Instruction Formats ............................................................................... 38

2.6.5

Notes on Use of Bit Manipulation Instructions .............................................. 39

2.7

Addressing Modes and Effective Address Calculation .................................................. 39

2.7.1

Addressing Modes .......................................................................................... 39

2.7.2

Effective Address Calculation ........................................................................ 42

2.8

Processing States ............................................................................................................46

2.8.1

Overview......................................................................................................... 46

2.8.2

Program Execution State ................................................................................ 47

2.8.3

Exception-Handling State ............................................................................... 47

2.8.4

Exception-Handling Sequences ...................................................................... 49

2.8.5

Bus-Released State ......................................................................................... 50

2.8.6

Reset State ...................................................................................................... 50

2.8.7

Power-Down State .......................................................................................... 50

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