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AD6649EBZ Datasheet(PDF) 39 Page - Analog Devices |
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AD6649EBZ Datasheet(HTML) 39 Page - Analog Devices |
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39 / 41 page  AD6649 Data Sheet Rev. C | Page 38 of 40 NCO/FIR SYNC Pin Control (Register 0x59) Bits[7:2]—Reserved Bit 1—SYNC Pin Sensitivity If Bit 1 is set to a 0, the SYNC input responds to a level. If this bit is set low, the SYNC input responds to the edge (rising or falling) set in Bit 0 of Address 0x59. Bit 0—SYNC Pin Edge Sensitivity If Bit 1 is set high, setting Bit 0 to a 0 causes the SYNC input to respond to a falling edge. If this bit is set, the SYNC input respond to a rising edge. NCO Control 2 (Register 0x5A) Bits[7:1]—Reserved Bit 0—Low Latency NCO Select If Bit 0 is set to a 1, the low latency NCO is selected. This bit should be selected for the fixed-frequency NCO, 95 MHz FIR filter mode of operation. When this bit is set, the NCO value must be set to either 0x40000000 or 0xC0000000. |
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