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MSP430A005IPWR Datasheet(PDF) 25 Page - Texas Instruments |
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MSP430A005IPWR Datasheet(HTML) 25 Page - Texas Instruments |
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25 / 47 page ![]() MSP430x11x2, MSP430x12x2 MIXED SIGNAL MICROCONTROLLER SLAS361D − JANUARY 2002 − REVISED AUGUST 2004 25 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) 10-bit ADC, power supply and input range conditions (see Note 1) PARAMETER TEST CONDITIONS MIN NOM MAX UNIT VCC Analog supply voltage VSS = 0 V 2.2 3.6 V V(P6.x/Ax) Analog input voltage range (see Note 2) All Ax terminals. Analog inputs selected in ADC10AE register and PxSel.x=1 VSS ≤ VPx.x/Ax ≤ VCC 0 VCC V Operating supply current fADC10CLK = 5.0 MHz ADC10ON = 1, REFON = 0 VCC = 2.2 V 0.52 1.05 IADC10 into VCC terminal (see Note 3) ADC10ON = 1, REFON = 0 ADC10SHT0=1, ADC10SHT1=0, ADC10DIV=0 VCC = 3 V 0.6 1.2 mA IREF+ Reference operating supply current, reference buffer disabled (see Note 4) fADC10CLK = 5.0 MHz ADC10ON = 0, REFON = 1, REF2_5V = x; REFOUT = 0 VCC = 2.2V/3 V 0.25 0.4 mA Reference buffer fADC10CLK = 5.0 MHz ADC10ON = 0, ADC10SR = 0 1.1 1.4 IREFB operating supply current (see Note 4) ADC10ON = 0, REFON = 1, REF2_5V = 0 REFOUT = 1 ADC10SR = 1 0.46 0.55 mA CI † Input capacitance Only one terminal can be selected at one time, Px.x/Ax VCC = 2.2 V 27 pF RI† Input MUX ON resistance 0V ≤ VAx ≤ VCC VCC = 3 V 2000 Ω † Not production tested, limits verified by design NOTES: 1. The leakage current is defined in the leakage current table with Px.x/Ax parameter. 2. The analog input voltage range must be within the selected reference voltage range VR+ to VR− for valid conversion results. 3. The internal reference supply current is not included in current consumption parameter IADC10. 4. The internal reference current is supplied via terminal VCC. Consumption is independent of the ADC10ON control bit, unless a conversion is active. The REFON bit enables the built-in reference to settle before starting an A/D conversion. 10-bit ADC, external reference (see Note 1) PARAMETER TEST CONDITIONS VCC MIN NOM MAX UNIT VeREF+ Positive external reference voltage input VeREF+ > VREF−/VeREF− (see Note 2) 1.4 VCC V VREF− /VeREF− Negative external reference voltage input VeREF+ > VREF−/VeREF− (see Note 3) 0 1.2 V (VeREF+ − VREF−/VeREF−) Differential external reference voltage input VeREF+ > VREF−/VeREF− (see Note 4) 1.4 VCC V IVeREF+ Static input current 0V ≤VeREF+ ≤ VCC 2.2 V/3 V ±1 µA IVREF−/VeREF− Static input current 0V ≤ VeREF− ≤ VCC 2.2 V/3 V ±1 µA NOTES: 1. The external reference is used during conversion to charge and discharge the capacitance array. The input capacitance, CI, is also the dynamic load for an external reference during conversion. The dynamic impedance of the reference supply should follow the recommendations on analog-source impedance to allow the charge to settle for 10-bit accuracy. 2. The accuracy limits the minimum positive external reference voltage. Lower reference voltage levels may be applied with reduced accuracy requirements. 3. The accuracy limits the maximum negative external reference voltage. Higher reference voltage levels may be applied with reduced accuracy requirements. 4. The accuracy limits minimum external differential reference voltage. Lower differential reference voltage levels may be applied with reduced accuracy requirements. |
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