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XRT7300 Datasheet(PDF) 21 Page - Exar Corporation |
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XRT7300 Datasheet(HTML) 21 Page - Exar Corporation |
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21 / 55 page  áç áç áç áç XRT7300 E3/DS3/STS-1 LINE INTERFACE UNIT REV. 1.1.1 17 MICROPROCESSOR SERIAL INTERFACE TIMING (SEE FIGURE 9) SYMBOL PARAMETER MIN.TYP.MAX.UNITS t21 CS Low to Rising Edge of SCLK Setup Time 50 ns t22 CS High to Rising Edge of SCLK Hold Time 20 ns t23 SDI to Rising Edge of SCLK Setup Time 50 ns t24 SDI to Rising Edge of SCLK Hold Time 50 ns t25 SCLK “Low” Time 240 ns t26 SCLK “High” Time 240 ns t27 SCLK Period 500 ns t28 CS Low to Rising Edge of SCLK Hold Time 50 ns t29 CS Inactive Time 250 ns t30 Falling Edge of SCLK to SDO Valid Time 200 ns t31 Falling Edge of SCLK to SDO Invalid Time 100 ns t32 Falling Edge of SCLK or Rising Edge of CS to High Z 100 ns t33 Rise/Fall time of SDO Output 40 ns FIGURE 9. TIMING DIAGRAM FOR THE MICROPROCESSOR SERIAL INTERFACE SDI R/W A1 A0 CS SCLK CS SCLK SDI SDO D0 D1 D2 D7 t22 t21 t23 t24 t25 t26 t27 t28 t29 t30 t31 t32 t33 Hi-Z Hi-Z |
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