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XRT7300 Datasheet(PDF) 41 Page - Exar Corporation |
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XRT7300 Datasheet(HTML) 41 Page - Exar Corporation |
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41 / 55 page ![]() áç áç áç áç XRT7300 E3/DS3/STS-1 LINE INTERFACE UNIT REV. 1.1.1 37 If the XRT7300 is operating in the HOST Mode: Access the Microprocessor Serial Interface and write a “1” into the LLB bit-field and a “0” into the RLB bit- field in Command Register 4. If the XRT7300 is operating in the Hardware Mode: The LLB input pin (pin 14) must be set to “High” and the RLB input pin (pin 15) must be set to “Low”. NOTES: 1. The Analog Local Loop-Back Mode does not work if the transmitter is turned off via the TXOFF fea- ture. 2. The XRT7300 automatically Declares an LOS Con- dition anytime it has been configured to operate in either the Analog Local Loop-Back or Digital Local Loop-Back Modes. Consequently, the MUTing - upon -LOS must be disabled prior to configuring the device to operate in either of these local Loop- Back modes. 4.2 THE DIGITAL LOCAL LOOP-BACK MODE When the XRT7300 is configured to operate in the Digital Local Loop-Back Mode, it ignores any signals that are input to the RTIP and RRING input pins. The Transmitting Terminal Equipment transmits clock and data into the XRT7300 via the TPDATA, TNDATA and TCLK input pins. This data is processed through the Transmit Clock Duty Cycle Adjust PLL and the HDB3/ B3ZS Encoder block and then looped back to the HDB3/B3ZS Decoder block. Figure 29 illustrates the path that the data takes when the chip is configured to operate in the Digital Local Loop-Back Mode. FIGURE 28. THE ANALOG LOCAL LOOP-BACK IN THE XRT7300 AGC/ Equalizer Peak Detector LOS Detector Slicer Clock Recovery Data Recovery Invert Loop MUX HDB3/ B3ZS Decoder LOSTHR SDI SDO/LCV SCLK CS REGRESET RTIP RRING REQDIS RCLK1 RCLK2 RPOS RNEG DECODIS RLOS LLB RLB ENCODIS TAOS TPDATA TNDATA TCLK RLOL EXCLK Device Monitor MTIP MRING Transmit Logic Duty Cycle Adjust TXLEV TXOFF DMO TTIP TRING Pulse Shaping HDB3/ B3ZS Encoder Serial Processor Interface Analog Local Loop-Back Path COMMAND REGISTER CR4 (ADDRESS = 0X04) D4 D3 D2 D1 D0 X STS-1/DS3 E3 LLB RLB XX X 1 0 |
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