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XRT7300 Datasheet(PDF) 39 Page - Exar Corporation |
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XRT7300 Datasheet(HTML) 39 Page - Exar Corporation |
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39 / 55 page ![]() áç áç áç áç XRT7300 E3/DS3/STS-1 LINE INTERFACE UNIT REV. 1.1.1 35 of the RPOS, RNEG and RCLK signals when the RCLK signal has been inverted. In order to configure the XRT7300 to invert the RCLK1 output signal, the XRT7300 must be operat- ing in the HOST Mode. This configuration can be im- plemented by accessing the Microprocessor Serial Interface block and writing a “1” into the RCLK1INV bit-field in Command Register CR3 to invert RCLK1. The RCLK2 output signal can also be inverted when the XRT7300 is operating in the Hardware Mode by setting the RCLK2INV input pin “High”. 3.7.1 Routing Single-Rail Format data (Binary Data Stream) to the Receive Terminal Equipment To route Single-Rail format data (e.g., a binary data stream) from the Receive Section of the XRT7300 to the Receiving Terminal Equipment, do the following: A. configure the XRT7300 to operate in the HOST Mode and B. access the Microprocessor Serial Interface and write a “1” into the RNRZ bit-field in Command Register CR3. After these steps are taken, the XRT7300 outputs Single-Rail data to the Receiving Terminal Equipment via the RPOS and RCLK1 (or RCLK2) output pins as illustrated in Figure 26 and Figure 27. NOTE: The RNEG output pin is internally tied to Ground whenever this feature is enabled. FIGURE 25. THE BEHAVIOR OF THE RPOS, RNEG AND RCLK1 SIGNALS WHEN RCLK1 IS INVERTED RCLK1 RPOS RNEG COMMAND REGISTER CR3 (ADDRESS = 0X03) D4 D3 D2 D1 D0 RNRZ LOSMUT CLK2DIS RCLK2INV RCLK1INV XX X 1 1 COMMAND REGISTER CR3 (ADDRESS = 0X03) D4 D3 D2 D1 D0 RNRZ LOSMUT CLK2DIS RCLK2INV RCLK1INV 1X X X X |
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