COPC912C datasheet(6/24 Pages) NSC

6 / 24 page

Functional Description (Continued)

TLDD12060 – 5

RC l 5 x POWER SUPPLY RISE TIME

FIGURE 3 Recommended Reset Circuit

OSCILLATOR CIRCUITS

The device can be driven by a clock input which can be

between DC and 5 MHz

CRYSTAL OSCILLATOR

By selecting CKO as a clock output CKI and CKO can be

connected to create a crystal controlled oscillator Table I

shows the component values required for various standard

crystal values

RC OSCILLATOR

By selecting CKI as a single pin oscillator CKI can make an

RC oscillator CKO is available as a general purpose input

andor HALT control Table II shows variation in the oscilla-

tor frequencies as functions of the component (R and C)

value

TLDD12060 – 6

FIGURE 4 Clock Oscillator Configurations

TABLE I Crystal Oscillator Configuration

CKI

(kX)(mX)

(pF)

Freq

(MHz)

30 – 36

200

100 – 150

0455

TABLE II RC Oscillator Configuration

(Part-to-Part Variation TA e 25 C)

CKI Freq

Intr

(kX)

(pF)

(MHz)

Cycle

(ms)

22 to 27

37 to 46

100

11 to 13

74 to 9

100

09 to 11

88 to 108

Note

3k s R s 200 kX 50pF s C s 200 pF

HALT MODE

The device is a fully static device The device enters the

HALT mode by writing a one to the G7 bit of the G data

not receive any clock signal and is therefore frozen in the

exact state it was in when halted In this mode the chip will

only draw leakage current

The device supports two different ways of exiting the HALT

mode The first method is with a low to high transition on the

CKO (G7) pin This method precludes the use of the crystal

clock configuration (since CKO is a dedicated output) and

so may be used either with an RC clock configuration (or an

external clock configuration) The second method of exiting

the HALT mode is to pull the RESET low

Note

To allow clock resynchronization it is necessary to program two

NOP’s immediately after the device comes out of the HALT mode

The user must program two NOP’s following the ‘‘enter HALT mode’’

(set G7 data bit) instruction

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