DS3142 datasheet(30/88 Pages) DALLAS

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DS3141/DS3142/DS3143/DS3144 Single/Dual/Triple/Quad DS3/E3 Framers

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MSRIE

Master Status Register Interrupt Enable

0Ah

Bit #

Name

LORCIE

LOTCIE

T3E3IE

FEACIE

HDLCIE

BERTIE

COVFIE

OSTIE

Default

Bit 0: One-Second Timer Interrupt Enable (OSTIE). This bit enables an interrupt if the OSTL bit in the MSRL

0 = interrupt disabled

1 = interrupt enabled

Bit 1: Counter Overflow Event Interrupt Enable (COVFIE). This bit enables an interrupt if the COVFL bit in the

MSRL register is set.

0 = interrupt disabled

1 = interrupt enabled

Bit 2: Change in BERT Status Interrupt Enable (BERTIE). This bit enables an interrupt if the BERT bit in the

MSR register is set.

0 = interrupt disabled

1 = interrupt enabled

Bit 3: Change in HDLC Status Interrupt Enable (HDLCIE). This bit enables an interrupt if the HDLC bit in the

MSR register is set.

0 = interrupt disabled

1 = interrupt enabled

Bit 4: Change in FEAC Status Interrupt Enable (FEACIE). This bit enables an interrupt if the FEAC bit in the

MSR register is set.

0 = interrupt disabled

1 = interrupt enabled

Bit 5: Change in DS3/E3 Framer Status Interrupt Enable (T3E3IE). This bit enables an interrupt if the T3E3 bit in

the MSR register is set.

0 = interrupt disabled

1 = interrupt enabled

Bit 6: Loss-of-Transmit Clock Interrupt Enable (LOTCIE). This bit enables an interrupt if the LOTCL bit in the

MSRL register is set.

0 = interrupt disabled

1 = interrupt enabled

Bit 7: Loss-of-Receive Clock Interrupt Enable (LORCIE). This bit enables an interrupt if the LORCL bit in the

MSRL register is set.

0 = interrupt disabled

1 = interrupt enabled

DS3142 Datasheet(PDF) 30 Page - Dallas Semiconductor

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