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LTC1407ACMSE Datasheet(PDF) 1 Page - Linear Technology |
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LTC1407ACMSE Datasheet(HTML) 1 Page - Linear Technology |
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1 / 24 page  1 LTC1407/LTC1407A 1407f Serial 12-Bit/14-Bit, 3Msps Simultaneous Sampling ADCs with Shutdown s 3Msps Sampling ADC with Two Simultaneous Differential Inputs s 1.5Msps Throughput per Channel s Low Power Dissipation: 14mW (Typ) s 3V Single Supply Operation s 2.5V Internal Bandgap Reference with External Overdrive s 3-Wire Serial Interface s Sleep (10 µW) Shutdown Mode s Nap (3mW) Shutdown Mode s 80dB Common Mode Rejection at 100kHz s 0V to 2.5V Unipolar Input Range s Tiny 10-Lead MS Package , LTC and LT are registered trademarks of Linear Technology Corporation. s Telecommunications s Data Acquisition Systems s Uninterrupted Power Supplies s Multiphase Motor Control s I & Q Demodulation s Industrial Control The LTC ®1407/LTC1407A are 12-bit/14-bit, 3Msps ADCs with two 1.5Msps simultaneously sampled differential inputs. The devices draw only 4.7mA from a single 3V supply and come in a tiny 10-lead MS package. A Sleep shutdown feature lowers power consumption to 10 µW. The combination of speed, low power and tiny package makes the LTC1407/LTC1407A suitable for high speed, portable applications. The LTC1407/LTC1407A contain two separate differential inputs that are sampled simultaneously on the rising edge of the CONV signal. These two sampled inputs are then converted at a rate of 1.5Msps per channel. The 80dB common mode rejection allows users to elimi- nate ground loops and common mode noise by measuring signals differentially from the source. The devices convert 0V to 2.5V unipolar inputs differen- tially. The absolute voltage swing for CH0+, CH0–, CH1+ and CH1– extends from ground to the supply voltage. The serial interface sends out the two conversion results in 32 clocks for compatibility with standard serial interfaces. – + 1 2 7 3 6 S & H – + 4 5 S & H GND 11 EXPOSED PAD VREF 10 µF CH0– CH0+ CH1– CH1+ 3V 10 µF LTC1407A 8 10 9 THREE- STATE SERIAL OUTPUT PORT MUX 2.5V REFERENCE TIMING LOGIC VDD SDO CONV SCK 1407A BD 3Msps 14-BIT ADC FREQUENCY (MHz) 0.1 –80 –74 –68 –62 –56 1 10 100 1407 G02 –86 –92 –98 –104 –50 –44 THD 3rd 2nd FEATURES DESCRIPTIO APPLICATIO S BLOCK DIAGRA THD, 2nd and 3rd vs Input Frequency |
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