AN1368 datasheet(17/34 Pages) MICROCHIP

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 2011 Microchip Technology Inc.

DS01368A-page 17

AN1368

• DISPCLK is the clock which drives the display

glass.

• System clock is the clock speed at which the

program accesses the Command/Control/Status

registers.

• G1CLK is the clock which drives the GPUs to

draw lines, rectangles, render characters and

decode compressed data without the involvement

of the processor.

• External RAM, up to 16 MB, can be connected

through the EPMP module using a parallel inter-

face. The graphics module can use this on its own

without any involvement of the processor. The

interfaces allowed are limited to an 8-bit or 16-bit

parallel connection. For more options and informa-

tion, refer to Section 42. “Enhanced Parallel

Master Port (EPMP)”

(DS39730) in the “PIC24F

Family Reference Manual”

• HSYNC, VSYNC are the horizontal and vertical

synchronization signals to the display.

• GCLK is the pixel clock.

• GEN is a signal that varies in function for TFT and

STN display types of interfaces. For TFT, this sig-

nal indicates that data lines are valid. For STN,

this signal toggles per line on the Line Toggle

mode and toggles per frame for the Frame Toggle

mode. For more information, refer to Section 43.

“Graphics Controller Module (GFX)”

(DS39731) in the “PIC24F Family Reference

Manual”

• GD<15:0> carry the display RGB or Gray values

as per the graphics module settings. Only the

required number of lines is enabled, depending

on the interface requirements of the display. (e.g.,

16 lined for TFT LCD’s RGB565 input or four lines

for MSTN’s grayscale input).

• GPWR is the power supply control signal for the

display glass. In some large displays, an external

circuitry may be needed. Use this signal to enable

or disable the external power circuitry. In displays

that include an internal power circuitry, this signal

can be connected to the display’s power enable

pin. This signal should not be used as a power

supply line to the display glass.

Table 4 lists the number of microcontroller pins

required for various display and RAM configurations.

The Graphics Processing Units (GPUs) like the

Character Graphical Processing Unit (CHRGPU),

Rectangle Copy Graphics Processing Unit (RCCGPU)

and Inflate Processing Unit (IPU) are the graphics

accelerators. These accelerators are used for

rendering characters, rectangles and to decompress

the compressed data, respectively.

These GPUs help to free the processing power of the

microcontroller, which can be used for the purpose of

the application. Instead of the CPU rendering the

pixels, the application only needs to issue the

commands to draw primitive rendering functions (such

as lines, bars and characters) to the screen. After

issuing the commands, the CPU is free to perform

other application tasks. The application code runs in

parallel to the RCCGPU, which concurrently draws the

line. However, care should be taken because returning

from a function, for example, Line(), need not imply

that the line is completely drawn. This is called a non-

blocking draw. The drawing can also be made blocking

by setting the proper compiler switch in the

GraphicsConfig.h

file, as explained in future

sections.

TABLE 4:

MICROCONTROLLER PINS

Configuration

Display Data

Pins (RGB)

EPMP

Pins

Other (Clock

and Sync)

Pins

Total

A TFT LCD without External RAM (using CLUT

and 16-bit colors)

A 256-Color CSTN without External RAM

A TFT LCD with External 16-Bit Wide RAM of

256 Kbytes (using 16-bit colors)

A 16-Color MSTN without External RAM

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