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LF6197 Datasheet(PDF) 4 Page - National Semiconductor (TI) |
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LF6197 Datasheet(HTML) 4 Page - National Semiconductor (TI) |
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4 / 12 page ![]() Electrical Characteristics (Continued) Note 1 Absolute Maximum Ratings indicate limits beyond which damage to the device may occur Note 2 Operating Ratings indicate conditions for which the device is functional but do not guarantee specific performance limits For guaranteed specifications and test conditions see the Electrical Characteristics The guaranteed specifications apply only for the test conditions listed Some performance characteristics may degrade when the device is not operated under the listed test conditions Note 3 The maximum power dissipation must be derated at elevated temperatures and is dictated by TJmax HJA and the ambient temperature TA The maximum allowable power dissipation is PD e (TJmax b TA) HJA or the number given in the Absolute Maximum Ratings whichever is lower For this device TJmax e 150 C and iJA e 125 CW The Power Derating Curve shows the safe thermal operating area for this device Note 4 Continuous short-circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150 C Note 5 Human body model 100 pF capacitor discharged through a 15 kX resistor Note 6 Typicals are at TA e 25 C and represent the most likely parametric norm Note 7 Limits are guaranteed to National’s AOQL (Average Outgoing Quality Level) Note 8 Operation at g5V requires that pin 14 be forced to 25V Note 9 Gain error is calculated from the measured open loop gain Note 10 The acquisition time of the LF6197 has been measured when the device has been configured as an inverting amplifier with a gain of b1 feedback resistor of 2 kX feedback capacitor of 1 pF and a total load resistor of 1 kX Note 11 Hold step is measured with the LF6197 configured as a unity gain follower and input connected to ground A TTL pulse with 4 ns rise and fall times is applied to the logic input the hold step is dependent on the slew rate of the logic input pulse Note 12 See test circuit Figure 1 Note 13 Full power bandwidth is calculated using FPBW e SR(2qVP) where SR is the measured slew rate and VP is the peak voltage 4 |
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