TLH11381

September 1992

LF6197 160 ns Monolithic Sample-and-Hold Amplifier

General Description

The LF6197 is a monolithic sample-and-hold (SH) amplifier

that uses a proprietary ‘‘current-multiplexed sample-and-

hold’’ technique to offer extremely high speed while main-

taining 12 bits or higher accuracy The device is built using

160 ns and has 10 mV hold step error when going from

sample to hold mode The input offset voltage in the sample

mode is typically 3 mV Even at extremely fast acquisition

speeds no compromises are made in the droop rate which

is 06 mV ms When configured for unity gain the DC gain

error is 003% The feedthrough attenuation in the hold

mode is 83 dB at DC and 77 dB at 100 kHz

The LF6197 can be externally configured for either inverting

or non-inverting gains thus offering additional flexibility to

the user The device includes an internal 10 pF hold capaci-

tor

Features

Y

Y

CMOS TTL and ECL compatible logic input

Y

Adjustable inverting or non-inverting gain

Y

Internal hold capacitor

Y

High power-supply rejection in both sample and hold

modes

Key Specifications

Y

Acquisition time (10V step to 001%)

160 ns

Y

Hold mode settling time (10V step to 001%)

50 ns

Y

Droop rate

06 mV ms

Y

Hold step

10 mV

Y

Aperture jitter

Y

Feedthrough attenuation at DC

83 dB

Y

Small signal bandwidth

25 MHz

Applications

Y

High-speed data acquisition systems

Y

Automatic test equipment

Y

High-speed instrumentation

Y

Replaces expensive hybrid sample-and-hold amplifiers

Block Diagram

TLH11381 – 1

Connection Diagram

TLH11381 – 2

Top View

Ordering Information

Industrial

Package

LF6197CCJ

J14A

Ceramic DIP

C1995 National Semiconductor Corporation

RRD-B30M115Printed in U S A