Functional Description

The LF6197 uses a proprietary ‘‘current-multiplexed sam-

ple-and-hold’’ technique as depicted in the simplified block

diagram

(Figure 2) The amplifier consists of two transcon-

output buffer stage A3 In the sample mode internal current

nected Additionally switches S2 and S3 are closed there-

by shorting the internal dummy capacitor and connecting

one end of the hold capacitor to a low impedance ground

Although the simplified schematic shows the switches S1

and S2 connected to ground the switches are in fact con-

nected to a reference potential which appears as a common

nected to the output through a resistor thus closing the loop

around the amplifier Conventional op-amp feedback topolo-

gies may be employed to configure the amplifier for invert-

ing and non-inverting gains In the sample mode a current

booster in the output stage rapidly charges the hold capaci-

tor A wide-bandwidth amplifier high-current output stage

and fast current-switched hold-to-sample mode selection al-

lows for a slew rate of 145 V ms and acquisition time of

under 200 ns

When there is a change to the Hold mode switches S2 and

S3 are quickly opened and switch S1 is effectively connect-

A3 and the loop around the amplifier is closed by the hold

capacitor Note that the opening of switch S3 causes

charge injection into the hold capacitor However an equal

amount of charge is injected into the dummy capacitor due

to the opening of a matched switch S2 The net effect is a

differential cancellation of charge and thus the pedestal er-

ror (hold step) is greatly reduced Meanwhile excellent

feedthrough attenuation is achieved because the input sig-

nal is isolated from the output by the inactive input stage

TLH11381 – 5

FIGURE 2 Simplified Block Diagram of LF6197 Sample-and-Hold Amplifier Connected for Unity Gain and TTL Logic

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