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Data Sheet

AD7292

THEORY OF OPERATION

ANALOG INPUTS

The AD7292 has eight analog input channels. By default, these

channels are configured as single-ended inputs. Differential

operation is also available by configuring VIN0 and VIN1 to

operate as a differential pair.

Single-Ended Mode

In applications where the signal source has high impedance, it

is recommended that the analog input be buffered before it is

applied to the ADC.

The analog input range is programmed to one of these values:

0 V to VREF, 0 V to 2 × VREF, or 0 V to 4 × VREF. For information

about programming the input range, see the VIN RANGE0 and

VIN RANGE1 Subregisters (Address 0x10 and Address 0x11)

section.

In 0 V to 2 × VREF mode, the input is scaled by a factor of 2 before

the conversion takes place. In 0 V to 4 × VREF mode, the input

is scaled by a factor of 4 before the conversion takes place. Note

that the voltage with respect to AGND on the ADC analog input

pins cannot exceed AVDD.

If the analog input signal to be sampled is bipolar, the internal

reference of the ADC can be used to externally bias this signal

up so that it is correctly formatted for the ADC. Figure 31 shows

a typical connection diagram when operating the ADC in single-

ended mode with a bipolar ±0.625 V input signal.

AD7292

REFOUT

VIN0

0.47µF

+0.625V

–0.625V

VIN7

VIN

+1.25V

Figure 31. Interfacing to a Bipolar Input Signal

Differential Mode

The AD7292 can be configured to have one differential analog

input pair (VIN0 and VIN1). Differential signals have some

benefits over single-ended signals, including noise immunity

based on the common-mode rejection of the device and improve-

ments in distortion performance. Figure 32 shows the fully

differential analog input of the AD7292.

VREF p-p

VIN+

VIN0

AD7292

COMMON-MODE

VOLTAGE

VIN1

VIN–

VREF p-p

Figure 32. Differential Analog Input

The amplitude of the differential signal is the difference

between the signals applied to the input pins of the differential

pair, VIN0 and VIN1. The resulting converted data is stored in

straight binary format in the ADC data register. VIN0 and VIN1

should be simultaneously driven by two signals that are 180° out

of phase; each signal should be of maximum amplitude VREF,

2 × VREF, or 4 × VREF, depending on the selected range.

Therefore, if the 0 V to VREF range is selected, the amplitude of

the differential signal is −VREF to +VREF peak-to-peak (2 × VREF),

regardless of the common-mode voltage (VCM).

The common-mode voltage is the average of the two signals.

VCM = (VIN+ + VIN−)/2

The common-mode voltage is, therefore, the voltage on which

the two inputs are centered; the resulting span for each input is

VCM ± VREF/2. This voltage must be set up externally. When the

inputs are driven with an amplifier, the actual common-mode

range is determined by the output voltage swing of the amplifier

and the input common-mode range of the AD7292. The common-

mode voltage must be in this range to guarantee the functionality

of the AD7292 (see Figure 33). When a conversion takes place,

the common-mode voltage is rejected, resulting in a virtually

noise-free signal of amplitude −VREF to +VREF.

0.5

1.0

1.5

2.0

2.5

3.0

3.5

COMMON-MODE VOLTAGE (V)

1 × VREF

2 × VREF

4 × VREF

AVDD = 5V

DVDD = 3V

VDRIVE = 3V

TA = 25°C

fSAMPLE = 225kSPS

INTERNAL REFERENCE

DIFFERENTIAL MODE

Figure 33. Common-Mode Voltage (Dependent on Input Range)

Rev. A | Page 15 of 40

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