ATPL00B datasheet(21/152 Pages) ATMEL

21 / 152 page

Atmel ATPL00B [datasheet]

43028A-ATPL - 9/12

P0 and P2 ports are no longer used to access external memories, but Special Function Registers (SFR) P0 and P2

are still functional.

P2 register is used to generate the high order address byte when executing MOVX A,@Ri or MOVX

@Ri,A.

P0 register is the program address control register and it is used to specify the size of extended program

pages and to control bank switching.

4.3.2

Extended Addressing

ATPL00B combines program code and data in a single 128KB SRAM.

ADDRESS to access program is generated as a function of P0(7:6), P0(5:0) and PC(15:0).

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

B it 0

SX1

SX0

P05

P04

P03

P02

P01

P00



SX(1:0): Size of extended program pages and common program space

SX(1:0)

Extended

Common

“11”

“10”

“01”

“00”

0KB

8KB

16KB

32KB

64KB

56KB

48KB

32KB



P0(5:0): Extended program page number

Allowing different configurations as the one shown in Figure 4-4

Figure 4-4.

SRAM Extended Addressing. 48KB common memory + 3x16KB extended program pages

XDATA

PROGRAM

MEMORY

PAGE 0

PAGE 1

0x000000

0x00BFFF

0x00C000

0x00FFFF

0x010000

0x01FFFF

0x0000

0x7FFF

xdata

logical

address

PAGE 2

0x013FFF

0x014000

128KBytes

SRAM

ATPL00B Datasheet(PDF) 21 Page - ATMEL Corporation

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