ATPL00B datasheet(4/152 Pages) ATMEL

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Atmel ATPL00B [datasheet]

43028A-ATPL - 9/12

7. Serial Peripheral Interfaces SPI0 and SPI1 ...................................... 64

7.1

SPI description ................................................................................................ 64

7.1.2

SPI clock phase, polarity and operation............................................ 66

7.1.3

SPI0 write collision............................................................................ 68

7.2

SPI Modes ...................................................................................................... 68

7.3

SPI1 buffer operation ...................................................................................... 70

8. Boot Loader ..................................................................................... 72

8.1

Pin Description ................................................................................................ 73

8.2

Flash Programming......................................................................................... 74

8.2.1

In-System programming.................................................................... 74

8.2.2

SPI Flash programming .................................................................... 74

8.3

System startup ................................................................................................ 76

8.3.1

Encrypted firmware requirements ..................................................... 77

8.3.2

Supported Devices ........................................................................... 77

8.3.2.1

Serial Number Device ..................................................... 77

9. Dimmer Peripheral ........................................................................... 78

9.1

Configuration Registers................................................................................... 79

9.1.1

DIM_CTRL register ........................................................................... 80

9.1.2

INP_ST register ................................................................................ 81

9.1.3

OUT_ST register............................................................................... 82

9.1.4

OUT_REF registers .......................................................................... 83

9.1.5

POLARITY register ........................................................................... 84

9.1.6

D_CONF register .............................................................................. 85

9.1.7

V_SWC register ................................................................................ 86

9.1.8

PWM_PER register........................................................................... 87

9.1.9

INP_SOURCE register...................................................................... 88

9.2

External Circuits .............................................................................................. 89

10. Media Access Layer......................................................................... 92

10.1

Packet Encapsulation...................................................................................... 92

10.2

MAC Architecture ............................................................................................ 94

10.3

MAC Configuration Registers.......................................................................... 94

10.3.1

CTRL register ................................................................................... 95

10.3.2

FLAGS1 register ............................................................................... 97

10.3.3

FLAGS2 register ............................................................................... 99

10.3.4

DATA register ................................................................................. 101

10.3.5

TH_PREAM register ....................................................................... 102

10.3.6

TH_HEADER register ..................................................................... 103

10.3.7

BAUDRATE register ....................................................................... 104

10.3.8

TRACK register............................................................................... 105

10.3.9

PREAM register .............................................................................. 106

10.3.10 CTRL2 register ............................................................................... 107

10.3.11 BC register...................................................................................... 108

10.3.12 MODE1 to MODE4 registers........................................................... 109

10.3.13 VTB_BE_HARD register ................................................................. 110

10.3.14 VTB_BE_SOFT registers................................................................ 111

10.3.15 FEC_BER register .......................................................................... 112

10.4

Operation modes........................................................................................... 113

10.4.2

BYPASS mode ............................................................................... 113

10.4.3

WHD mode ..................................................................................... 113

10.4.4

BYTE mode .................................................................................... 114

10.4.5

FEC mode....................................................................................... 114

10.4.6

VTB mode....................................................................................... 114

10.4.7

FCS mode....................................................................................... 114

10.4.8

NULL mode..................................................................................... 114

10.5

Operation Procedures ................................................................................... 114

10.5.1

STOP cycle..................................................................................... 114

10.5.2

WHD mode operation procedure .................................................... 114

10.5.3

Transmission procedure ................................................................. 116

ATPL00B Datasheet(PDF) 4 Page - ATMEL Corporation

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