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AD8367S Datasheet(PDF) 15 Page - Analog Devices |
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AD8367S Datasheet(HTML) 15 Page - Analog Devices |
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15 / 19 page ![]() Equation 6 : ᴛAGC (us) = 10 x CAGC (nF) where the internal 5 pF capacitor is lumped with the external capacitor to give CAGC. The AD8367S can be configured either as a VGA whose gain is controlled externally through the GAIN pin or as an AGC amplifier, using a supply voltage of 3V to 5.25V. The supply to the VPSO and VPSI pins should be decoupled using a low inductance, 0.1uF surface-mount, ceramic capacitor as close as possible to the device. Additional supply decoupling can be provided by small series resistors. A 10 nF capacitor from the DECL pin to the OCOM pin is recommended to decouple the output reference voltage. The AD8367S is designed to operate in a 200 Ω impedance system. The output amplifier is a low output impedance voltage buffer with a 50 Ω damping resistor to desensitize it from load reactance and parasitics. The quoted performance includes the volt age division between the 50 Ω resistor and the 200 Ω load. The AD8367S can be reactively matched to an impedance other than 200 Ω by using traditional step-up and step-down matching networks or high quality transformers. In some applications, the printed circuit board (PCB) parasitics, in combination with the source impedance presented by the driving stage, can present some troublesome impedance at high frequency and can potentially un-stabilize the amplifier under certain extreme conditions, such as high gain at high temperature. To address such scenarios, it is recommended to include a series inductor on the INPT pin as close to the device as possible. This inductor forms a snubbing network to choke out high frequencies from entering the device. A value of 10 nH or higher is recommended to minimize high frequency energy on the INPT pin. This inductor also minimizes the negative impact due to reflective source conditions at high RF frequencies to ensure the amplifier operates unconditionally stable to maintain typical device performance. It is also recommended that stitching be used to tie ground planes together around input and output signal traces, and under the AD8367S. This stitching forms a low impedance ground plane to ensure specified electrical performance and to reduce thermal resistance. The AD8367S is a general-purpose VGA suitable for use in a wide variety of applications where voltage control of gain is needed. While having a 500 MHz bandwidth, its use is not limited to high frequency signal processing. Its accurate, temperature- and supply-stable linear-in-dB scaling is valuable wherever it is important to have a more dependable response to the control voltage that is usually offered by VGAs of this sort. For example, there is no preclusion to its use in speech bandwidth systems. Figure 8 shows the basic connections. The CHP capacitor at the HPFL pin can be used to alter the high-pass corner frequency of the signal path and is associated with the offset control loop that eliminates the inherent variation in the internal dc balance of the signal path as the gain is varied (offset ripple). This frequency should be chosen to be about a decade below the lowest frequency component of the signal. If made much lower than necessary, the offset loop is not able to track the variations that occur when there are rapid changes in VGAIN. The control of offset is important even when the output is ac-coupled because of the potential reduction of the upper and lower voltage range at this pin. However, in many applications these components are unnecessary because an internal network provides a default high-pass corner frequency of about 500 kHz. For CHP = 1 nF, the modified corner is at about 10 kHz; it scales downward with increasing capacitance. Figure 9 shows representative response curves for the indicated component values. |
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