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XCL103 Datasheet(PDF) 9 Page - Torex Semiconductor |
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XCL103 Datasheet(HTML) 9 Page - Torex Semiconductor |
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9 / 20 page ![]() 9/20 XCL102/XCL103 Series ■ OPERATIONAL EXPLANATION The XCL102/XCL103 series consists of a reference voltage source, ramp wave circuit, error amplifier, PWM comparator, phase compensation circuit, N-channel driver transistor, P-channel synchronous rectification switching transistor and current limiter circuit. The error amplifier compares the internal reference voltage with the resistors RFB1 and RFB2. Phase compensation is performed on the resulting error amplifier output, to input a signal to the PWM comparator to determine the turn-on time of the N-channel driver transistor during PWM operation. The PWM comparator compares, in terms of voltage level, the signal from the error amplifier with the ramp wave from the ramp wave circuit, and delivers the resulting output to the buffer driver circuit to cause the Lx pin to output a switching duty cycle. This process is continuously performed to ensure stable output voltage. The current feedback circuit monitors the N-channel driver transistor’s turn-on current for each switching operation, and modulates the error amplifier output signal to provide multiple feedback signals. This enables a stable feedback loop even when a low ESR capacitor, such as a ceramic capacitor, is used, ensuring stable output voltage. <Reference voltage source, soft start function> The reference voltage forms a reference that is used to stabilize the output voltage of the IC. After “H” level is fed to CE pin, the reference voltage connected to the error amp increases linearly during the soft start interval. This allows the voltage divided by the internal RFB1 and RFB2 resistors and the reference voltage to be controlled in a balanced manner, and the output voltage rises in proportion to the rise in the reference voltage. This operation prevents rush input current and enables the output voltage to rise smoothly. <Ramp Wave Circuit> The ramp wave circuit determines switching frequency. The frequency is fixed internally at 3.0MHz. The Clock generated is used to produce ramp waveforms needed for PWM operation, and to synchronize all the internal circuits. <Error Amplifier> The error amplifier is designed to monitor output voltage. The amplifier compares the reference voltage with the feedback voltage divided by the internal resistors (RFB1 and RFB2). When the FB is lower than the reference voltage, output voltage of the error amplifier increases. The gain and frequency characteristics of the error amplifier are optimized internally. <VDDMAX> VDD MAX circuit compares the input voltage and the output voltage then it will select the higher one as the power supply for the IC. <Shutdown function, load disconnection function> The IC enters chip disable state by applying low level voltage to the CE pin. At this time, the N-channel and P-channel synchronous switching transistors are turned OFF With the XCL102D/103D types, the orientation of the parasitic diode of the P-channel synchronous switching transistor is fixed at anode: VOUT and cathode: Lx during shutdown to break conduction from the input side to the output side by the parasitic diode of the P-channel synchronous switching transistor. <PWM/PFM control circuit> When PFM operates, the N-channel driver transistor turns on at the timing of the signal sent from the PWM comparator. The N-channel driver transistor remains on until the current in the coil reaches a constant current (IPFM). The PWM/PFM control circuit compares the signal sent from the PWM comparator to the time it takes the current in the coil to reach a constant current (IPFM), and outputs the pulse that results in a longer on- time of the N-channel driver transistor. This enables smooth switching between PWM and PFM. The XCL102 series directly outputs the signal that is sent from the PWM comparator. VDD MAX RFB1 Load Disconnect Controller CE Controller Logic PWM Comparator Buffer Drive LX VBAT VOUT Current sense Short-circuit protection Latch Timer Vref with Soft Start CFB Inductor GND L2 L1 PFM/PWM Controller Logic VDD CE VOUT CL Discharge Error Amp. Phase Compensation RAMP Wave Generator OSC RFB2 FB VOUT < BLOCK DIAGRAM (D type) > |
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