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SL28541BZCT Datasheet(PDF) 15 Page - Silicon Laboratories |
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SL28541BZCT Datasheet(HTML) 15 Page - Silicon Laboratories |
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15 / 31 page ![]() SL28541 ...................... DOC #: SP-AP-0063 (Rev. AA) Page 15 of 31 Byte 18: Control Register 18 Byte 17: Control Register 17 Bit @Pup Name Description 7 0 SMSW_EN Enable Smooth Switching 0 = Disabled, 1= Enabled 6 0 SMSW_SEL Smooth switch select 0 = CPU_PLL, 1 = SRC_PLL 5 0 SE1/SE2_BIT0 SE1 and SE2 drive strength Setting 2 of 3(see Byte 18 for more setting) 0 = Low, 1= High 4 0 Prog_PCI-E_EN Programmable PCI-E frequency enable 0 = Disabled, 1= Enabled 3 0 Prog_CPU_EN Programmable CPU frequency enable 0 = Disabled, 1= Enabled 2 0 REF_BIT0 REFdrive strength strength Setting 2 of 3(see Byte 18 for more setting) 0 = Low, 1= High 1 0 USB_BIT0 USB drive strength strength Setting 2 of 3(see Byte 18 for more setting) 0 = Low, 1= High 0 0 PCI/ PCIF_BIT0 PCI drive strength strength Setting 2 of 3(see Byte 18 for more setting) 0 = Low, 1= High 7 0 REF_BIT2 Drive Strength Control 6 0 RESERVED 5 1 RESERVED 4 0 RESERVED 3 0 USB_BIT2 2 0 PCI/PCIF_BIT2 1 0 SE1/SE2_BIT2 0 0 RESERVED BIT_2 (By te18) BIT_1 (Vario us B ytes ) BIT_0 (Byte 17) Buffer Strength 1 1 1 Strongest 11 0 10 1 10 0 01 1 Def ault 01 0 00 1 Table 5. Output Driver Status during PCI-STP# and CPU-STP# PCI_STP# Asserted CPU_STP# Asserted SMBus OE Disabled Single-ended Clocks Stoppable Driven low Running Driven low Non stoppable Running Running Differential Clocks Stoppable Clock driven high Clock driven high Clock driven Low or 20K pulldown Clock# driven low Clock# driven low Non stoppable Running Running Table 6. Output Driver Status All Single-ended Clocks All Differential Clocks except CPU1 CPU1 w/o Strap w/ Strap Clock Clock# Clock Clock# Latches Open State Low Hi-z Low or 20K pulldown Low Low or 20K pulldown Low Powerdown Low Hi-z Low or 20K pulldown Low Low or 20K pulldown Low M1 Low Hi-z Low or 20K pulldown Low Running Running |
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