CYW43340 datasheet(79/96 Pages) CYPRESS

79 / 96 page

Document Number: 002-14943 Rev. *L

Page 79 of 96

PRELIMINARY

CYW43340

16.3 2.5V LDO (LDO2P5)

16.4 HSICDVDD LDO

Table 37. LDO2P5 Specifications

Specification

Notes

Min.

Typ.

Max.

Unit

Input supply voltage

Min= 2.52+0.15=2.67V

Dropout voltage requirement must be met under the maximum load

for performance specifications.

2.93.6

4.8V

Output current

–

Output voltage, Vo

default = 2.52V

2.4

2.52

3.4V

Dropout voltage

at max load

150

Output voltage DC

Accuracy

include Line/Load regulation

–5

Quiescent current

No load

–

µA

Line regulation

Vin from (Vo + 0.15V) to 4.8V, maximum load

–11

Load Regulation

Load from 1–70 mA (subject to parasitic resistance of package and

board). Vin = 2.52 + 0.15V to 4.8V

–

1531mV

Leakage current

Powerdown mode. At Junction Temp 85°C

–

µA

PSRR

VBAT ≥ 3.6V, Vo = 2.52V, Co = 2.2 µF,

maximum load, 100 Hz to 100 kHz

–

LDO turn-on time

LDO turn-on time when rest of chip is up

–

260

µs

In-rush current during

turn-on

from its output capacitor in fully-discharged state

–

100

External output

capacitor, Co

Ceramic, X5R, 0402,

(ESR: 5m-240mohm), ±20%, 6.3V

0.7a

a.Minimum cap value refers to residual cap value after taking into account part–to–part tolerance, DC–bias, temperature, aging

2.2

2.64

µF

External input capacitor For SR_VDDBATA5V pin (shared with Bandgap) ceramic, X5R,

0402, ±10%, 10V. Not needed if sharing the VBAT capacitor 4.7 µF

with SR_VDDBATP5V.

–1–µF

Table 38. HISCDVDD LDO Specifications

Specification

Notes

Min

Typ

Max

Units

Input supply voltage

Min = 1.2V + 0.1V = 1.3V.

Dropout voltage requirement must be met

under maximum load for performance specifi-

cations.

1.3

1.35

1.5

Output current

–

Output voltage, Vo

Step size 25 mV. Default = 1.2V.

1.1

1.2

1.275

Dropout voltage

At maximum load. Includes 100 mΩ routing

resistors at input and output.

––100

Output voltage DC accuracy

Including line/load regulation.

–4

–

Quiescent current

No load. Dependent on programming.

ldo_cntl_i[43], ldo_cntl_i[41] to support

different external capacitor loads.

–182

–

µA

PSRR at 1 kHz

Input ≥ 1.35V, 50 to 300 pF, Vo = 1.2V

Load: 80 mA

Load: 40 mA

––

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