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PD16707 Datasheet(PDF) 17 Page - NEC

Part # PD16707
Description  MOS INTEGRATED CIRCUIT
PDF  21 Pages
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Manufacturer  NEC [NEC]
Direct Link  http://www.nec.com/
Logo NEC - NEC

PD16707 Datasheet(HTML) 17 Page - NEC

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Data Sheet S16411EJ1V0DS
17
µµµµ PD16707
Switching Characteristics (TA = –20 to +75
°C, VDD1 = 2.3V to 3.6V, VDD2 = 23 V, VEE = –10 V, VSS = 0 V)
Parameter
Symbol
Condition
MIN.
TYP.
MAX.
Unit
Cascade Output Delay Time
tPHL1
CL = 55 pF,
500
ns
tPLH1
CLKR (CLKL)
→ STVL (STVR)
500
ns
tPHL2
500
ns
tPLH2
CL = 300 pF,
CLKR (CLKL)
→ On
500
ns
tPHL3
500
ns
Driver Output Delay Time
tPLH3
CL = 300 pF,
OER (OEL)
→ On
500
ns
Output Rise Time
tTLH
CL = 300 pF
800
ns
Output Fall Time
tTHL
800
ns
Input Capacitance
CI
TA = 25
°C50
pF
Timing Requirements (TA =
−−−−20 to +75°°°°C, VDD1 = 2.3 to 3.6 V, VDD2 = 23 V, VEE = −−−−10 V, VSS = 0 V)
Parameter
Symbol
Condition
MIN.
TYP.
MAX.
Unit
Clock Pulse High Width
PWCLK(H)
500
ns
Clock Pulse Low Width
PWCLK(L)
500
ns
Enable Pulse Width
PWOE
1000
ns
Data Setup Time
tSETUP
STVR (STVL)
↑→ CLKR, CLKL↑
200
ns
Data Hold Time
tHOLD
CLKR, CLKL
↑→ STVR (STVL) ↓
200
ns
Remark Unless otherwise specified, the input level is defined to be VIH = VIL = 0.5 VDD1.
Caution Keep the time and fall time of the logic input to tr = tf = 20 ns (10 to 90% of the rated values).



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