ATAR092 datasheet(53/100 Pages) ATMEL

53 / 100 page

ATAR092/ATAR892

4535C–4BMCU–02/04

Timer 3 Control Register 1

(T3C) Write

Timer 3 Status Register 1

(T3ST) Read

Note:

The status bits T3C1, T3C2 and T3ED will be reset after a READ access to T3ST.

Timer 3 Clock Select Register

(T3CS)

Primary register address: ’C’hex - Write

Bit 3

Bit 2

Bit 1

Bit 0

Write

T3EIM

T3TOP

T3TS

T3R

Reset value: 0000b

T3EIM

Timer 3 Edge Interrupt Mask

T3EIM = 0, disables the interrupt when an edge event for Timer 3 occurs (T3I)

T3EIM = 1, enables the interrupt when an edge event for Timer 3 occurs (T3I)

T3TOP

Timer 3 Toggle Output Preset

T3TOP = 0, sets toggle output (M3) to ‘0’

T3TOP = 1, sets toggle output (M3) to ‘1’

Note: If T3R = 1, no output preset is possible

T3TS

Timer 3 Toggle with Start T3TS = 0, Timer 3 output is not toggled during the start

T3TS = 1, Timer 3 output is toggled if started with T3R

T3R

Timer 3 Run

T3R = 0, Timer 3 stop and reset

T3R = 1, Timer 3 run

Primary register address: ’C’hex - Read

Bit 3

Bit 2

Bit 1

Bit 0

Read

–

T3ED

T3C2

T3C1

Reset value: x000b

T3ED

Timer 3 Edge Detect

This bit will be set by the edge-detect logic of Timer 3 input (T3I)

T3C2

Timer 3 Compare 2

This bit will be set when a match occurs between Counter 3 and T3CO2

T3C1

Timer 3 Compare 1

This bit will be set when a match occurs between Counter 3 and T3CO1

Address: ‘B’hex - Subaddress: ‘1’hex

Bit 3

Bit 2

Bit 1

Bit 0

T3CS

T3E1

T3E0

T3CS1

T3CS0

Reset value: 1111b

T3E1

Timer 3 Edge select bit 1

T3E0

Timer 3 Edge select bit 0

Table 23. External Input Edge Select Bits

T3E1

T3E0

Timer 3 Input Edge Select (T3I)

–

Positive edge at T3I pin

Negative edge at T3I pin

Each edge at T3I pin

ATAR092 Datasheet(PDF) 53 Page - ATMEL Corporation

ATAR092 Datasheet(HTML) 53 Page - ATMEL Corporation

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