PAC5232 datasheet(46/66 Pages) ACTIVE-SEMI

46 / 66 page

Power Application Controller

-46-

Rev 1.1

6-Jan-2018

14.6

SRAM

The PAC5232 Memory Controller provides access to the 8kB SRAM for non-persistent data storage. The

SRAM memory supports word (4B), half-word (2B) and byte addresses with aligned access.

The PAC5232 Memory Controller can read or write data from RAM up to 50MHz. This can be a benefit for

time-critical applications. This memory can also be used for program execution when modifying the

contents of FLASH.

For more information on the PAC5232 Memory Controller, see the PAC5232 User Guide.

14.7

SWD Protection

The PAC5232 allows the user to blow a fuse that prohibits use of the SWD serial interface.

This will prevent unauthorized users from accessing the contents of the device after customer production.

14.8

Electrical Characteristics

Table 14-1 Memory System Electrical Characteristics

(VCCIO = 5V, TA = -40C to 105C unless otherwise specified.)

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNIT

Embedded FLASH

tREAD;FLASH

FLASH read time

tWRITE;FLASH

FLASH write time

s

tPERASE;FLASH

FLASH page erase time

NPERASE;FLASH

FLASH program/erase cycles

100k

cycles

tDR;FLASH

FLASH data retention

years

SRAM

tACC;SRAM

SRAM access time

Word (32-bits), aligned

PAC5232 Datasheet(PDF) 46 Page - Active-Semi, Inc

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