DS26503LN datasheet(3/123 Pages) DALLAS

3 / 123 page

DS26503 T1/E1/J1 BITS Element

3 of 123

T1 FRAMER/FORMATTER CONTROL REGISTERS ....................................................40

8.1

T1 CONTROL REGISTERS ...............................................................................................40

E1 FRAMER/FORMATTER CONTROL REGISTERS....................................................46

9.1

E1 CONTROL REGISTERS ...............................................................................................46

9.2

E1 INFORMATION REGISTERS..........................................................................................48

10.

I/O PIN CONFIGURATION OPTIONS ............................................................................52

11.

T1 SYNCHRONIZATION STATUS MESSAGE ..............................................................55

11.1

T1 BIT-ORIENTED CODE (BOC) CONTROLLER ................................................................55

11.2

TRANSMIT BOC.............................................................................................................55

11.3

RECEIVE BOC...............................................................................................................56

12.

E1 SYNCHRONIZATION STATUS MESSAGE ..............................................................64

12.1

SA/SI BIT ACCESS BASED ON CRC4 MULTIFRAME...........................................................64

12.2

ALTERNATE SA/SI BIT ACCESS BASED ON DOUBLE-FRAME...............................................74

13.

LINE INTERFACE UNIT (LIU) ........................................................................................77

13.1

LIU OPERATION ............................................................................................................78

13.2

LIU RECEIVER ..............................................................................................................78

13.2.1 Receive Level Indicator ...................................................................................................... 78

13.2.2 Receive G.703 Section 10 Synchronization Signal............................................................. 79

13.2.3 Monitor Mode ..................................................................................................................... 79

13.3

LIU TRANSMITTER.........................................................................................................79

13.3.1 Transmit Short-Circuit Detector/Limiter............................................................................... 80

13.3.2 Transmit Open-Circuit Detector.......................................................................................... 80

13.3.3 Transmit BPV Error Insertion.............................................................................................. 80

13.3.4 Transmit G.703 Section 10 Synchronization Signal (E1 Mode) .......................................... 80

13.4

MCLK PRE-SCALER......................................................................................................80

13.5

JITTER ATTENUATOR......................................................................................................80

13.6

CMI (CODE MARK INVERSION) OPTION...........................................................................81

13.7

LIU CONTROL REGISTERS .............................................................................................82

13.8

RECOMMENDED CIRCUITS ..............................................................................................90

13.9

COMPONENT SPECIFICATIONS ........................................................................................92

14.

LOOPBACK CONFIGURATION.....................................................................................96

15.

6312KHZ SYNCHRONIZATION INTERFACE................................................................97

15.1

RECEIVE 6312KHZ SYNCHRONIZATION INTERFACE OPERATION ........................................97

15.2

TRANSMIT 6312KHZ SYNCHRONIZATION INTERFACE OPERATION.......................................97

16.

JTAG BOUNDARY SCAN ARCHITECTURE AND TEST ACCESS PORT ...................98

16.1

INSTRUCTION REGISTER...............................................................................................102

16.2

TEST REGISTERS.........................................................................................................103

16.3

BOUNDARY SCAN REGISTER.........................................................................................103

16.4

BYPASS REGISTER ......................................................................................................103

16.5

IDENTIFICATION REGISTER............................................................................................103

DS26503LN Datasheet(PDF) 3 Page - Dallas Semiconductor

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