MP4570 – 3A, 55V, SYNCHRONOUS STEP DOWN CONVERTER

MP4570 Rev. 1.01

www.MonolithicPower.com

18

1/4/2017

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© 2017 MPS. All Rights Reserved.

When using electrolytic or tantalum capacitors,

place a small, high-quality, ceramic capacitor

(0.1μF) as close to the IC as possible. When

using ceramic capacitors, make sure that they

have enough capacitance to provide sufficient

charge to prevent excessive voltage ripple at the

input. The input voltage ripple caused by

capacitance is approximately:























IN

OUT

IN

OUT

SW

LOAD

IN

V

V

1

V

V

C1

f

I

∆V

Output Capacitor

The output capacitor (C2) maintains the DC

output voltage. Use ceramic, tantalum, or low-

ESR electrolytic capacitors. Low-ESR capacitors

are preferred to keep the output voltage ripple

low. The output voltage ripple can be estimated

as:









































C2

f

8

1

R

V

V

1

L

f

V

∆V

SW

ESR

IN

OUT

SW

OUT

OUT

ESR value of the output capacitor.

For

ceramic

capacitors,

the

capacitance

dominates the impedance at the switching

frequency and contributes the most to the output

voltage ripple. For simplification, the output

voltage ripple can be estimated by:

























IN

OUT

2

SW

OUT

OUT

V

V

1

C2

L

f

8

V

∆V

For tantalum or electrolytic capacitors, the ESR

dominates the impedance at the switching

frequency. For simplification, the output ripple is

approximately:

ESR

IN

OUT

SW

OUT

OUT

R

V

V

1

L

f

V

∆V













 







The characteristics of the output capacitor also

affect the stability of the regulation system. The

MP4570 can be optimized for a wide range of

capacitances and ESR values.

Compensation Components

MP4570 employs current-mode control for easy

compensation and fast transient response. The

COMP pin controls the system stability and

transient response. The COMP pin is the output

of the internal error amplifier. A series capacitor-

resistor

combination

sets

a

pole-zero

combination to control the control system’s

characteristics. The DC gain of the voltage

feedback loop is:

OUT

FB

VEA

CS

LOAD

VDC

V

V

A

G

R

A









1000V/V;

is

the

current-sense

resistor value.

The system has two important poles: One from

the compensation capacitor (C3) and the output

resistor of error amplifier, and the other due to

the output capacitor and the load resistor. These

poles are located at:

VEA

EA

P1

A

C3

2π

G

f







LOAD

P2

R

C2

2π

1

f







Where,

is

the

error-amplifier

transconductance, 630μA/V.

The system has one important zero due to the

compensation capacitor and the compensation

resistor (R3). This zero is located at:

R3

C3

2π

1

f

Z1







The system may have another significant zero if

the output capacitor has a large capacitance or a

high ESR value. This zero is located at:

ESR

ESR

R

C2

2π

1

f







In this case, a third pole set by the compensation

capacitor (C4) and the compensation resistor can

compensate for the effect of the ESR zero. This

pole is located at:

R3

C4

2π

1

f

P3





