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COP413C Datasheet(PDF) 12 Page - National Semiconductor (TI) |
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COP413C Datasheet(HTML) 12 Page - National Semiconductor (TI) |
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12 / 16 page ![]() COP413C Instruction Set (Continued) TABLE III COP413C Instruction Set (Continued) Hex Machine Mnemonic Operand Code Language Code Data Flow Skip Conditions Description (Binary) TRANSFER OF CONTROL INSTRUCTIONS JID FF 1111 1111 ROM (PC8 AM) x None Jump Indirect (Note 2) PC70 JMP a 6b 0110 000 a8 a x PC None Jump – a70 JP a – 1 a60 a x PC60 None Jump within Page (pages 2 3 only) (Note 1) or – 11 a50 a x PC50 (all other pages) JSRP a – 10 a50 PC a 1 x SA x SB None Jump to Subroutine Page (Note 2) 010 x PC86 a x PC50 JSR a 6b 0110 100 a8 PC a 1 x SA x SB None Jump to Subroutine – a70 a x PC RET 48 0100 1000 SB x SA x PC None Return from Subroutine RETSK 49 0100 10011 SB x SA x PC Always Skip on Return Return from Subroutine then Skip HALT 33 0011 0011 None Halt processor 38 0011 1000 MEMORY REFERENCE INSTRUCTIONS CAMQ 33 0011 0011 A x Q74 None Copy A RAM to Q 3C 0011 1100 RAM(B) x Q30 CQMA 33 0011 0011 Q74 xRAM(B) None Copy Q to RAM A 2C 0010 1100 Q30 xA LD r b 5 00 r 0101 RAM(B) x A None Load RAM into A Br Z r x Br Exclusive-OR Br with r LQID BF 1011 1111 ROM(PC8 AM) x Q None Load Q Indirect SA x SB RMB 0 4C 0100 1100 0 x RAM(B)0 None Reset RAM Bit 145 0100 0101 0 x RAM(B)1 242 0100 0010 0 x RAM(B)2 343 0100 0011 0 x RAM(B)3 SMB 0 4D 0100 1101 1 x RAM(B)0 None Set RAM Bit 147 0100 0111 1 x RAM(B)1 246 0100 0110 1 x RAM(B)2 34B 0100 1011 1 x RAM(B)3 STII y 7b 0111 y y x RAM(B) None Store Memory Immediate Bd a 1 x Bd and Increment Bd Xr b 6 00 r 0110 RAM(B) A None Exchange RAM with A Br Z r x Br Exclusive-OR Br with r XAD 315 23 0010 0011 RAM(315) A None Exchange A with RAM BF 1011 1111 (315) 12 |
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