MP2019 - 40V, 300mA, LOW QUIESCENT-CURRENT LINEAR REGULATOR

MP2019 Rev. 1.01

www.MonolithicPower.com

14

1/10/2018

MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.

© 2018 MPS. All Rights Reserved.

External Reverse Voltage Protection

In some situations, e.g. a backup battery is

connected as MP2019 load, the output voltage

may be held up while the input is either pulled to

ground, pulled to some intermediate voltage or is

floating. Thus, the output voltage is higher than

input voltage. Since the MP2019 PMOS pass

element has a body diode, a current will conduct

from the output to input and is not internally

limited.

It’s possible that the IC will be damaged

by this unlimited reverse current. To avoid this,

it

’s recommended to place an external diode at

input like below.

MP2019

IN

GND

OUT

PCB Layout Guidelines

Efficient PCB layout is critical to achieve good

regulation, ripple rejection, transient response,

and thermal performance. It is recommended

highly to duplicate the EVB layout for optimum

performance.

If changes are necessary, refer to Fig. 5 and

follow the guidelines below:

1)

Place input and output bypass ceramic

capacitors close to IN and OUT, respectively.

2)

Ensure all feedback connections are short

and direct. Place the feedback resistors and

compensation components as close to the

chip as possible.

3)

Connect IN, OUT, and especially, GND,

respectively, to a large copper area to cool

the chip. This improves thermal performance

and long-term reliability.

R1

R2

C3

C1

IN

PGDL

GND

PG

OUT

C2

MP2019

EN

FB

R3

C4

Top Layer

Bottom Layer

Figure 5. Recommended PCB Layout

DESIGN EXAMPLE

Fig. 6 is a design example following

the

forward cap:

R1

R2

C3

C1

IN

PGDL

GND

PG

OUT

1uF

22uF

1.64MΩ

1MΩ

3.3V

C2

2.2nF

MP2019

EN

FB

R3

100KΩ

47nF

C4

Figure 6. Design Example