MP4655–PURE, SINGLE-STAGE, LLC, LED CURRENT AND SYSTEM VOLTAGE CONTROLLER

MP4655 Rev 1.0

www.MonolithicPower.com

26

2/2/2016

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© 2016 MPS. All Rights Reserved.

Analog Dimming (ADIM, ADIMP)

The MP4655 implements either DC analog

dimming or pulse analog dimming for the LED

current (see Table 1).

For DC input analog dimming, apply a 0V to 2.4V

DC voltage on ADIM to program the LED current

from 0 to 100%. ADIMP is left open or pulled high

above 5V.

For pulse input analog dimming, apply the pulse

analog dimming signal on ADIMP and a capacitor

on ADIM. A duty cycle on the pulse analog

dimming signal from 0 to 100% dims the LED

current from 0 to 100%. A lower frequency of the

pulse analog dimming signal requires a larger

capacitor on ADIM. For a 10kHz pulse signal, a

capacitor

100nF

or

above

on

ADIM

is

recommended.

If analog dimming is not required, pull ADIM high

and leave ADIMP open. Analog dimming and

PWM dimming can be applied together.

Table 1: MP4655 Dimming Connections

Items

ADIM

ADIMP

PWM

Only DC input

analog

dimming

DC analog

dimming

signal 0 to

2.4V

Float or pulled

high above 5V

Pull high

Only pulse

input analog

dimming

Capacitor

Pulse analog

dimming signal

Pull high

Only PWM

dimming

Pull high

Float

PWM

PWM + DC

input analog

dimming

DC analog

dimming

signal 0-

2.4V

Float or pull

high above 5V

PWM

PWM + pulse

analog dimming

Capacitor

Pulse analog

dimming signal

PWM

Supply Input (VIN)

VIN is the supply input voltage of the IC. Bypass

VIN with a ceramic capacitor 0.47µF or larger.

LLC Gate Driver (VCC, GL, GR)

VCC supplies the gate drive signals GL, GR,

DIMO, and the charge pump from CFLY. Bypass

VCC with a ceramic capacitor 1µF or larger. VCC

can also be used to supply an external circuit. To

avoid noise during layout, place the VCC

capacitor directly between VCC and GND with a

short and separate wire.

GL and GR provide the driving signal for the LLC

power stage. GL and GR are 180 degree phase

shifted gate drive signals. With their enhanced

drive capability, GL and GR can directly drive the

external LLC MOSFETs in the power stage

through a gate driving transformer.

The gate driving transformer also isolates the

primary power stage and the secondary control

circuit. Place a 2.2nF Y-cap between the power

stage ground and the reference ground for the

control circuit to improve EMI performance. The

primary

inductance

of

the

gate

driving

transformer influences its magnetic current,

which is also supplied by the IC. The primary

inductance should be larger than 1mH, and is

recommended to be over 2mH.

Extra NMOS Gate Driver (CFLY, VDR_DN,

GATEN, SOURCE)

GATEN and SOURCE are connected to the extra

duty-controlled NMOS’ gate and source. They

provide a floating driving signal for the duty-

controlled NMOS. A resistor on GATEN can

adjust the driving speed.

CFLY and VDR_DN provide a charge pump

supply for GATEN referred to SOURCE. Connect

a flying capacitor 100nF or above on CFLY, and

diodes on SOURCE and VDR_DN, as shown in

the typical application circuit.

LED Driver Stage Enable Signal (EN_LED)

EN_LED is connected to the enable signal for the

LED driver stage. Logic high enables the LED

driver stage and logic low disables the LED driver

stage. When the LED driver stage fault is

triggered but the IC is not latched up, toggle the

enable signal to restart the LED driver stage.

System Enable Signal (PS_ON)

PS_ON is connected to the enable signal or

standby signal. The voltage level on PS_ON

determines the operation of the IC as follows:

1. PS_ON > 2V: the IC is enabled in normal

operation mode.

2. 0.8V < PS_ON ≤ 2V for 1ms: the IC is

disabled and no circuits work.

3. PS_ON ≤ 0.8V: the IC is enabled in

standby mode.