LTC4359 datasheet(8/20 Pages) LINER

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LTC4359

Rev D

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APPLICATIONS INFORMATION

The MOSFET’s on-resistance, RDS(ON), directly affects

the forward voltage drop and power dissipation. Desired

forward voltage drop should be less than that of a diode

for reduced power dissipation; 100mV is a good starting

point. Choose a MOSFET which has:

RDS(ON) <

Forward Voltage Drop

ILOAD

The resulting power dissipation is

Pd = (ILOAD)2 • RDS(ON)

Shutdown Mode

In shutdown, the LTC4359 pulls GATE low to SOURCE,

turningofftheMOSFETandreducingitscurrentconsump-

tion to 9µA. Shutdown does not interrupt forward current

flow, a path is still present through Q1’s body diode, as

shown in Figure 1. A second MOSFET is needed to block

the forward path; see the section Load Switching and

Inrush Control. When enabled the LTC4359 operates as

an ideal diode. If shutdown is not needed, connect SHDN

to IN. SHDN may be driven with a 3.3V or 5V logic sig-

nal, or with an open drain or collector. To assert SHDN

low, the pull down must sink at least 5µA at 500mV. To

enable the part, SHDN must be pulled up to at least 2V.

If SHDN is driven with an open drain, open collector or

switch contact, an internal pull-up current of 2.6µA (1µA

minimum) asserts SHDN high and enables the LTC4359.

If leakage from SHDN to ground cannot be maintained at

less than 100nA, add a pull-up resistor to >2V to assure

turn on. The self-driven open circuit voltage is limited

internally to 2.5V. When floating, the impedance is high

and SHDN is subject to capacitive coupling from nearby

clock lines or traces exhibiting high dV/dt. Bypass SHDN

to VSS with 10nF to eliminate injection. Figure 3a is the

simplestwaytocontroltheshutdownpin.Sincethecontrol

signal ground is different from the SHDN pin reference,

VSS, there could be momentary glitches on SHDN during

transients. Figures 3b and 3c are alternative solutions

that level-shift the control signal and eliminate glitches.

Figure 3a. SHDN Control

Figure 3b. Transistor SHDN Control

Figure 4c. Opto-Isolator SHDN Control

4359 F03a

LTC4359

VN2222LL

VSS

SHDN

OFF

4359 F03b

LTC4359

240k

100k

240k

48V

2N5551

VSS

SHDN

OFF

2N5401

4359 F03c

LTC4359

MOC

207M

48V

VSS

SHDN

OFF

Input Short-Circuit Faults

The dynamic behavior of an active, ideal diode entering

reverse bias is most accurately characterized by a delay

followed by a period of reverse recovery. During the delay

phase some reverse current is built up, limited by parasitic

resistances and inductances. During the reverse recovery

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